XRT75R12DIB-F Exar Corporation, XRT75R12DIB-F Datasheet - Page 5

Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C

XRT75R12DIB-F

Manufacturer Part Number
XRT75R12DIB-F
Description
Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT75R12DIB-F

Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V to 5 V
Package / Case
TBGA-420
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.3
8.0 THE SONET/SDH DE-SYNC FUNCTION WITHIN THE LIU ............................................................... 87
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
T
F
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
THE PER-CHANNEL REGISTERS........................................................................................................................... 67
REGISTER DESCRIPTION - PER CHANNEL REGISTERS .................................................................................... 67
8.1 BACKGROUND AND DETAILED INFORMATION - SONET DE-SYNC APPLICATIONS ........................... 87
8.2 MAPPING/DE-MAPPING JITTER/WANDER ................................................................................................. 89
8.3
8.4 CLOCK GAPPING JITTER ........................................................................................................................... 107
8.5 A REVIEW OF THE CATEGORY I INTRINSIC JITTER REQUIREMENTS (PER TELCORDIA GR-253-CORE)
24: C
25: C
26: C
27: D
28: C
29: XRT75R12D R
30: S
31: XRT75R12D R
32: XRT75R12D R
33: XRT75R12D R
34: XRT75R12D R
35: XRT75R12D R
36: XRT75R12D R
37: XRT75R12D R
38: E
39: XRT75R12D R
40: E
41: XRT75R12D R
42: E
43: S
8.2.1 HOW DS3 DATA IS MAPPED INTO SONET ............................................................................................................. 89
8.2.2 DS3 FREQUENCY OFFSETS AND THE USE OF THE "STUFF OPPORTUNITY" BITS ......................................... 96
8.3.1 THE CONCEPT OF AN STS-1 SPE POINTER......................................................................................................... 101
8.3.2 POINTER ADJUSTMENTS WITHIN THE SONET NETWORK ................................................................................ 103
8.3.3 CAUSES OF POINTER ADJUSTMENTS ................................................................................................................. 103
8.3.4 WHY ARE WE TALKING ABOUT POINTER ADJUSTMENTS? ............................................................................. 107
8.5.1 DS3 DE-MAPPING JITTER....................................................................................................................................... 109
8.5.2 SINGLE POINTER ADJUSTMENT ........................................................................................................................... 109
8.5.3 POINTER BURST...................................................................................................................................................... 110
44. A S
46. A
49. T
50. T
53. A
37. A S
38. A S
39. A S
40. T
41. T
42. I
43. A
45. A S
47. A
48. A
51. A
52. A
54. I
55. I
FOR DS3 APPLICATIONS .......................................................................................................................... 108
JITTER/WANDER DUE TO POINTER ADJUSTMENTS ............................................................................ 101
91
STS-1 SPE.......................................................................................................................................................................... 95
THAT HAS A BIT RATE OF
THAT HAS A BIT RATE OF
THE
AND THE
IGNATED
IGNATED
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
OURCE
RROR
RROR
RROR
UMMARY OF
HANNEL
HANNEL
HANNEL
EVICE
HIP
LLUSTRATION OF THE
LLUSTRATION OF THE
LLUSTRATION OF
HE
N
HE
HE
HE
N
N
N
N
N
N
J1
I
I
I
IMPLIFIED
LLUSTRATION OF THE
I
I
I
I
IMPLE
IMPLE
IMPLE
IMPLE
R
LLUSTRATION OF
LLUSTRATION OF THE
LLUSTRATION OF AN
LLUSTRATION OF AN
LLUSTRATION OF THE
LLUSTRATION OF THE
R
B
B
B
BYTE
ELATIONSHIP BETWEEN THE
EVISION
IT
/P
YTE
YTE
C
C
C
............................................................................................................................................................................. 105
............................................................................................................................................................................. 106
L
-
L
OUNTER
OUNTER
OUNTER
OCATION OF THE
ART
FORMAT OF THE
L
L
L
EVEL
-F
-F
I
I
I
I
EVEL
EVEL
EVEL
,
LLUSTRATION OF A
LLUSTRATION OF THE
LLUSTRATION OF THE
LLUSTRATION OF A
DESIGNATED
ORMAT OF THE
ORMAT OF THE
N
"C
"B
N
UMBER
EGISTER
I
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
ATEGORY
NTERRUPT
I
I
I
IT
UMBER
NTERRUPT
NTERRUPT
NTERRUPT
MSB
LSB
H
-O
S
OLDING
INGLE
RIENTED
T
YTE
R
YTE
B
T
44.736M
44.736M
ELCORDIA
YPICAL
R
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
YTE
EGISTER
MAP
STS-1 SPE
.................................................................................................................................................. 102
STS-1
STS-1 SPE
16-B
EGISTER
J1 B
I I
P
STS-1 SPE
B
B
R
E
R
R
IT
NTRINSIC
OINTER
E
S
S
IT
EGISTER
TOH
TOH
NABLE
S
EGISTER
EGISTER
" V
-F
NABLE
TATUS
TATUS
SHOWING
SHOWING
SHOWING
SHOWING
SHOWING
SHOWING
SHOWING
SHOWING
SHOWING
TRUCTURE OF THE
F
DS3
DS3 D
IT
SHOWING
YTE WITHIN THE
ORMAT WITHIN THE
ORMAT WITHIN THE
A
ERSION OF
BPS
BPS
W
SIGNAL BEING PROCESSED VIA A
SONET STS-1 F
STS-1 F
PPLICATIONS FOR THE
- CR110 (A
GR-253-CORE'
C
WITHIN AN
WITHIN AN
ORD
- CR111 (A
ONTENTS OF THE
R
SIGNAL BEING MAPPED INTO AND TRANSPORTED OVER THE
A
R
R
R
+ 1
- 1
EGISTER
- C
DJUSTMENT
ATA
J
- C
- C
TRAFFIC THAT WILL BE GENERATED BY THE
STRADDLING ACROSS TWO CONSECUTIVE
EGISTER
EGISTER
EGISTER
ITTER
TRAFFIC THAT WILL BE GENERATED BY THE
PPM
(
I
I
A
T
R
C
J
E
E
HANNEL N
PPM
CONSISTING OF THE
NTERRUPT
NTERRUPT
E
HANNEL N
-S
ITTER
HANNEL N
RANSMIT
LARM
RROR
RROR
ECEIVE
HANNEL
RAME
RROR
T
TREAM BEING
,
STS-1 F
STS-1 F
,
ELCORDIA
R
INTO AN
DDRESS
INTO AN
- C
EQUIREMENT PER
DDRESS
- CR224 (A
- CR97 (A
- CR225 (A
E
A
S
C
C
S
C
NVELOPE
TTENUATOR
TATUS
STS-1 SPE ............................................................................................. 94
HANNEL N
C
S
OUNTER
OUNTER
TRUCTURE WITH THE
C
OUNTER
S
RAME
C
A
CENARIO
ONTROL
16-
16-
A
E
S
A
ONTROL
R
ONTROL
DDRESS
"P
DDRESS
DDRESS
NABLE
TATUS
RAME
RAME
STS-1
L
ECOMMENDATION ON HOW MAP
STS-1
BIT WORD
BIT WORD
OINTER
GR-253-CORE'
OCATION
L
LIU
III
R
..................................................................................................... 90
OCATION
M
DDRESS
EGISTERS
LSB
H
C
MSB
DDRESS
DDRESS
................................................................................................. 92
................................................................................................. 93
APPED INTO AN
R
A
OLDING
APACITY OF AN
IN A
R
R
R
............................................................................................. 109
H1
R
L
SIGNAL
C
DDRESS
EGISTERS
L
SIGNAL
EGISTERS
EGISTERS
L
EGISTERS
OCATION
B
EGISTERS
YTE
ONTROL
OCATION
OCATION
YTE
ITS
AND
SONET D
= 0
T
(
(
S
CONSISTING OF THE
CONSISTING OF THE
= 0
ELCORDIA
L
LIP
" (
R
L
OCATION
L
R
X
(AS_
................................................................................. 100
R
EGISTERS
H2
OCATION
OCATION
.................................................................................. 99
6E) ........................................................................... 65
E
X
EGISTERS
L
EGISTERS
B
.
TOH
6F) ......................................................................... 66
G
OCATION
R
= 0
(RC_
S
UFFER
(IER_
(ISR_
= 0
BYTES
(CC_
= 0
.,
(TC_
N
EGISTERS
R
THE
) (
XM
STS-1 SPE,
E
ECOMMENDATION ON HOW TO MAP
STS-1 F
XM
XM
AND THE
-S
GR-253-CORE,
N
= 0
N
B (
N
N
N
N
.................................................................. 104
= 0
= 0
) (
A (
)
C (
10-
YNC
= [0:11]) ..................................................... 72
(EL_
STS-1
) (
) (
) (
) (
(EH_
"S
WITH THE
X
(EM_
= 0
N
M
M
X
61) ......................................................... 64
X
N
N
N
M
S
BIT EXPRESSION WITHIN THE
OURCE
= [0:11]) ............................................... 78
E0)....................................................... 63
E1)....................................................... 65
N
= 0-5 & 8-D) ........................................ 85
A
(JA_
OURCE
= [0:11]) .............................................. 80
= 0-5 & 8-D) ....................................... 84
= [0:11]).............................................. 67
= [0:11]).............................................. 70
XM
N
= 0-5 & 8-D) ....................................... 86
RAME
PPLICATION
= [0:11]) ........................................... 76
DS3
N
E
) (
H1
H1
N
FRAMES
) (
1 .................................................... 68
NVELOPE
) (
N
N
VIA A
N
" PTE,
AND
AND
) (
N
= [0:11])..................................... 84
10
................................................ 102
DATA INTO AN
= [0:11])................................... 85
PTE,
= [0:11]).................................. 84
N
BITS
FOR
SONET N
PTE .................................... 97
H2
H2
= [0:11]) ............................. 83
......................................... 101
WHEN MAPPING IN A
C
...................................... 107
WHEN MAPPING A
,
BYTES
BYTES
APACITY
REFLECTING THE LOCATION OF
DS3
APPLICATIONS
)
)
ETWORK
STS-1 SPE ......... 95
WITH THE
WITH THE
XRT75R12D
B
YTES
DS3
H1
............... 88
AND
D
DATA INTO AN
DS3
"D"
"I"
ESIGNATED
DS3
...... 108
H2
BITS DES
BITS DES
SIGNAL
SIGNAL
BYTES
-
)
-

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