XRT75R12DIB-F Exar Corporation, XRT75R12DIB-F Datasheet - Page 68

• Manufacturer Part Number: XRT75R12DIB-F
• Description: Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
• Manufacturer: Exar Corporation

Specifications of XRT75R12DIB-F

• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V to 5 V
• Package / Case: TBGA-420
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
Register - CR97 (Address Location = 0x61)
Reserved Reserved
N
B
UMBER
7, 6
B
IT
5
4
3
2
1
0
IT
7
T
ABLE
Channel 5 Interrupt Status
Channel 4 Interrupt Status
Channel 3 Interrupt Status
Channel 2 Interrupt Status
Channel 1 Interrupt Status
Channel 0 Interrupt Status
B
IT
25: C
6
Reserved
Interrupt Status
HANNEL
N
Channel 5
AME
B
R/O
IT
5
L
EVEL
Interrupt Status
I
NTERRUPT
Channel 4
T
B
R/O
R/O
YPE
IT
4
Channel n Interrupt Status Bit:
This READ-ONLY bit-field indicates whether the XRT75R12D has a
pending Channel n-related interrupt that is awaiting service. The first
six channels are serviced through this location and the other six at
address 0xE1. These two registers are used by the Host to identify
the source channel of an active interrupt.
0 - Indicates that there is NO Channel n-related Interrupt awaiting ser-
vice.
1 - Indicates that there is at least one Channel n-related Interrupt
awaiting service. In this case, the user's Interrupt Service routine
should be written such that the Microprocessor will now proceed to
read out the contents of the Source Level Interrupt Status Register -
Channel n (Address Locations = 0xn2) to determine the exact source
of the interrupt request.
N
S
OTE
TATUS
Interrupt Status
: Once this bit-field is set to "1", it will not be cleared back to "0"
Channel 3
until the user has read out the contents of the Source-Level
Interrupt Status Register bit, that corresponds to the interrupt
request channel.
64
R
B
R/O
IT
EGISTER
3
- CR97 (A
Interrupt Status
Channel 2
B
R/O
IT
D
2
ESCRIPTION
DDRESS
Interrupt Status
Channel 1
L
OCATION
B
R/O
IT
1
= 0
Interrupt Status
X
Channel 0
61)
B
REV. 1.0.3
R/O
IT
0