XRT75R12DIB-F Exar Corporation, XRT75R12DIB-F Datasheet - Page 75

Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C

XRT75R12DIB-F

Manufacturer Part Number
XRT75R12DIB-F
Description
Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT75R12DIB-F

Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V to 5 V
Package / Case
TBGA-420
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.3
S
B
OURCE
IT
N
UMBER
1
0
L
EVEL
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
Condition Interrupt
Condition Interrupt
I
Change of DMO
NTERRUPT
Change of LOS
Status
Status
N
AME
S
TATUS
R
T
RUR
RUR
YPE
EGISTER
Change of Receive LOS (Loss of Signal) Defect Condition Interrupt
Status:
This RESET-upon-READ bit-field indicates whether or not the Change of
the Receive LOS Defect Condition Interrupt (for Channel n) has occurred
since the last read of this register.
0 - Indicates that the Change of the Receive LOS Defect Condition Interrupt
has NOT occurred since the last read of this register.
1 - Indicates that the Change of the Receive LOS Defect Condition Interrupt
has occurred since the last read of this register.
N
Change of Transmit DMO (Drive Monitor Output) Condition Interrupt
Status - Ch n:
This RESET-upon-READ bit-field indicates whether or not the Change of
the Transmit DMO Condition Interrupt (for Channel n) has occurred since
the last read of this register.
0 - Indicates that the Change of the Transmit DMO Condition Interrupt has
NOT occurred since the last read of this register.
1 - Indicates that the Change of the Transmit DMO Condition Interrupt has
occurred since the last read of this register.
N
OTE
OTE
- C
: The user can determine the current state of the Receive LOS Defect
: The user can determine the current state of the Transmit DMO
HANNEL N
condition by reading out the contents of Bit 1 (Receive LOS Defect
Declared) within the Alarm Status Register.(n)
Condition by reading out the contents of Bit 0 (Transmit DMO
Condition) within the Alarm Status Register.(n)
71
A
DDRESS
L
OCATION
D
ESCRIPTION
= 0
XM
2 (
M
= 0-5 & 8-D)
XRT75R12D

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