NUMICRO-SDK Nuvoton Technology Corporation of America, NUMICRO-SDK Datasheet - Page 359
NUMICRO-SDK
Manufacturer Part Number
NUMICRO-SDK
Description
KIT EVAUATION NUC100/120/130/140
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Type
MCUr
Datasheets
1.NUC100LC1BN.pdf
(600 pages)
2.NUMICRO-SDK.pdf
(13 pages)
3.NUMICRO-SDK.pdf
(93 pages)
4.NUMICRO-SDK.pdf
(1 pages)
Specifications of NUMICRO-SDK
Contents
Board, Cable, CD, Nu-Link
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
NUC100, NUC120, NUC130, NUC140
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUMICRO-SDK
Manufacturer:
Nuvoton Technology Corporation
Quantity:
135
Company:
Part Number:
NUMICRO-SDK
Manufacturer:
NuvoTon
Quantity:
69
- NUC100LC1BN PDF datasheet
- NUMICRO-SDK PDF datasheet #2
- NUMICRO-SDK PDF datasheet #3
- NUMICRO-SDK PDF datasheet #4
- Current page: 359 of 600
- Download datasheet (6Mb)
SPI Divider Register (SPI_DIVIDER)
Register
SPI_DIVIDER SPIx_BA+0x04
Bits
[31:16]
[15:0]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
Descriptions
DIVIDER2
DIVIDER
30
22
14
6
R/W
R/W
Clock Divider 2 Register (master only)
The value in this field is the 2
generate the serial clock on the output SPICLK. The desired frequency is obtained
according to the following equation:
Clock Divider Register (master only)
The value in this field is the frequency divider of the system clock, PCLK, to generate
the serial clock on the output SPICLK. The desired frequency is obtained according to
the following equation:
In slave mode, the period of SPI clock driven by a master shall equal or over 5 times
the period of PCLK. In other words, the maximum frequency of SPI clock is the fifth of
the frequency of slave’s PCLK.
f
f
29
21
13
5
sclk
sclk
=
=
Description
Clock Divider Register (Master Only)
(
(
DIVIDER
DIVIDER
28
20
12
f
f
4
DIVIDER2[15:8]
DIVIDER2[7:0]
DIVIDER[15:8]
DIVIDER[7:0]
- 359 -
pclk
pclk
2
+
+
1
1
* )
* )
2
2
27
19
11
3
nd
frequency divider of the system clock, PCLK, to
Publication Release Date: Oct 22, 2010
26
18
10
2
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
24
16
8
0
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