NUMICRO-SDK Nuvoton Technology Corporation of America, NUMICRO-SDK Datasheet - Page 498

• Manufacturer Part Number: NUMICRO-SDK
• Description: KIT EVAUATION NUC100/120/130/140
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r
• Type: MCUr

Specifications of NUMICRO-SDK

• Contents: Board, Cable, CD, Nu-Link
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: NUC100, NUC120, NUC130, NUC140

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NuMicro™ NUC100 Series Technical Reference Manual
DIFFEN
PTEN
TRGEN
TRGCOND
TRGS
A/D Differential Input Mode Enable
1 = A/D is in differential analog input mode
0 = A/D is in single-end analog input mode
Differential input voltage (V
In differential input mode, only one of the two corresponding channels needs to be
enabled in ADCHER. The conversion result will be placed to the corresponding data
register of the enabled channel. If both channels of a differential input paired channel
are enabled, the ADC will convert it twice in scan mode. And then write the conversion
result to the two corresponding data registers.
PDMA Transfer Enable
1 = Enable PDMA data transfer in ADDR 0~7
0 = Disable PDMA data transfer
When A/D conversion is completed, the converted data is loaded into ADDR 0~7,
software can enable this bit to generate a PDMA data transfer request.
When PTEN=1, software must set ADIE=0 to disable interrupt.
External Trigger Enable
Enable or disable triggering of A/D conversion by external STADC pin.
1= Enable
0= Disable
External Trigger Condition
These two bits decide external pin STADC trigger event is level or edge. The signal
must be kept at stable state at least 8 PCLKs for level trigger and 4 PCLKs at high and
low state for edge trigger.
00 = Low level
01 = High level
10 = Falling edge
11 = Rising edge
Hardware Trigger Source
00 = A/D conversion is started by external STADC pin.
Others = Reserved
Software should disable TRGEN and ADST before change TRGS.
In hardware trigger mode, the ADST bit is set by the external trigger from STADC.
Differential input paired channel
- 498 -
0
1
2
3
diff
) = V
plus
Publication Release Date: Dec. 22, 2010
- V
minus
ADC0
ADC2
ADC4
ADC6
V
plus
ADC analog input
ADC1
ADC3
ADC5
ADC7
V
Revision V1.06
minus