NUMICRO-SDK Nuvoton Technology Corporation of America, NUMICRO-SDK Datasheet - Page 538
![KIT EVAUATION NUC100/120/130/140](/photos/18/31/183177/numicro-sdk_sml.jpg)
NUMICRO-SDK
Manufacturer Part Number
NUMICRO-SDK
Description
KIT EVAUATION NUC100/120/130/140
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Type
MCUr
Datasheets
1.NUC100LC1BN.pdf
(600 pages)
2.NUMICRO-SDK.pdf
(13 pages)
3.NUMICRO-SDK.pdf
(93 pages)
4.NUMICRO-SDK.pdf
(1 pages)
Specifications of NUMICRO-SDK
Contents
Board, Cable, CD, Nu-Link
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
NUC100, NUC120, NUC130, NUC140
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUMICRO-SDK
Manufacturer:
Nuvoton Technology Corporation
Quantity:
135
Company:
Part Number:
NUMICRO-SDK
Manufacturer:
NuvoTon
Quantity:
69
- NUC100LC1BN PDF datasheet
- NUMICRO-SDK PDF datasheet #2
- NUMICRO-SDK PDF datasheet #3
- NUMICRO-SDK PDF datasheet #4
- Current page: 538 of 600
- Download datasheet (6Mb)
PDMA Global Interrupt Status Register (PDMA_GCRISR)
Register
PDMA_GCRISR
Bits
[31]
[30:9]
[8]
[7]
[6]
[5]
[4]
INTR7
INTR
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Descriptions
INTR
Reserved
INTR8
INTR7
INTR6
INTR5
INTR4
INTR6
Offset
PDMA_BA_GCR+0x0C R
30
22
14
6
INTR5
Interrupt Pin Status
This bit is the Interrupt pin status of PDMA controller.
Note: This bit is read only
Reserved
Interrupt Pin Status of Channel 8 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel8.
Note: This bit is read only
Interrupt Pin Status of Channel 7 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel7.
Note: This bit is read only
Interrupt Pin Status of Channel 6 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel6.
Note: This bit is read only
Interrupt Pin Status of Channel 5 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel5.
Note: This bit is read only
Interrupt Pin Status of Channel 4 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel4.
Note: This bit is read only
29
21
13
5
R/W
Reserved
INTR4
Description
28
20
12
PDMA Global Interrupt Status Register
4
- 538 -
Reserved
Reserved
INTR3
27
19
11
3
Publication Release Date: Dec. 22, 2010
INTR2
26
18
10
2
INTR1
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
INTR8
INTR0
24
16
8
0
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