MT9V011P11STC:B Aptina LLC, MT9V011P11STC:B Datasheet - Page 10

• Manufacturer Part Number: MT9V011P11STC:B
• Description: SENSOR IMAGE VGA COLOR CMOS PLCC
• Manufacturer: Aptina LLC
• Series: DigitalClarity®, Micron®r
• Type: CMOS Imagingr

Specifications of MT9V011P11STC:B

• Pixel Size: 5.6µm x 5.6µm
• Active Pixel Array: 640H x 480V
• Frames Per Second: 30
• Voltage - Supply: 2.8V
• Package / Case: 28-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1315

Frame Timing Formulas
Table 3:
Table 4:
Table 5:
PDF: 817d5189/Source: 817d5173
MT9V011_C82S_2_PLCC.fm - Rev. B 1/05 EN
Parameter
Parameter
A
P
Q
A+Q
V
N
F
V’
F’
rows
Reg 0x30, bit 1:0
x (A + Q) Frame Valid Time
1x
01
00
Frame Time
Constant Value
Frame Time
Vertical Blanking (long
integration time)
Total Frame Time (long
integration time)
Active Data Time
Frame Start/End Blanking 6 x (Reg0x0A + 2)
Horizontal Blanking
Row Time
Vertical Blanking
Total Frame Time
Name
The constant 113 in the formulas in Table 3 is the constant value in default mode, when
8 dark columns are read out through Reg0x30. The constant follows the dark columns
read out as shown in Table 4.
Sensor timing is shown above in terms of pixel clock and master clock cycles (please
refer to Figure 7). The recommended master clock frequency is 27 MHz.
The vertical blanking and total frame time equations assume that the number of integra-
tion rows (bits 11 through 0 of Reg0x09) is less than the number of active plus blanking
rows (Reg0x03 + 1 + Reg0x06 + 1). If this is not the case, the number of integration rows
must be used instead to determine the frame time, as shown in Table 5.
Name
—
Master Clock
Constant
121
113
107
(Reg0x04 + 1) x (Reg0x0A + 2)
(113 + Reg0x05) x (Reg0x0A + 2)
(minimum Reg0x05 value = 9)
(Reg0x04 + 1 + 113 + Reg0x05) x (Reg0x0A + 2) 884 pixel clocks
(Reg0x06 + 1) x (A + Q) + (Q - 2 x P)
(Reg0x03 + 1) x (A + Q) - (Q - 2 x P)
(Reg0x03 + 1 + Reg0x06 + 1) x (A + Q)
(Reg0x09 - Reg0x03) x (A + Q) + (Q - 2 x P)
(Reg0x09 + 1) x (A + Q)
For 16 columns
For 8 columns
For no dark columns read, no row-wise noise correction applied
MT9V011 - 1/4-Inch VGA Digital Image Sensor
Equation (Master Clock)
10
Equation
Micron Technology, Inc., reserves the right to change products or specifications without notice.
640 pixel clocks
= 1280 master
= 47.4µs
6 pixel clocks
= 12 master
= 0.44µs
244 pixel clocks
= 488 master
= 18.07µs
= 1,768 master
= 65.48µs
25,868 pixel clocks
= 51,736 master
= 1.92ms
424,088 pixel clocks
= 848,176 master
= 31.41ms
449,956 pixel clocks
= 899,912 master
= 33.33ms
Default Timing At 27 MHz
©2004 Micron Technology, Inc. All rights reserved.
25,868 pixel clocks
= 51,736 master
= 1.92 ms
449,956 pixel clocks
= 899,912 master
= 33.33ms
Pixel Data Format
Default Timing
Preliminary
‡