MT9V011P11STC:B Aptina LLC, MT9V011P11STC:B Datasheet - Page 27

• Manufacturer Part Number: MT9V011P11STC:B
• Description: SENSOR IMAGE VGA COLOR CMOS PLCC
• Manufacturer: Aptina LLC
• Series: DigitalClarity®, Micron®r
• Type: CMOS Imagingr

Specifications of MT9V011P11STC:B

• Pixel Size: 5.6µm x 5.6µm
• Active Pixel Array: 640H x 480V
• Frames Per Second: 30
• Voltage - Supply: 2.8V
• Package / Case: 28-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1315

Propagation Delays for PIXCLK and Data Out Signals
Propagation Delays for FRAME_VALID and LINE_VALID Signals
Figure 19: Propagation Delays for PIXCLK and Data Out Signals
Figure 20: Propagation Delays for FRAME_VALID and LINE_VALID Signals
PDF: 817d5189/Source: 817d5173
MT9V011_C82S_2_PLCC.fm - Rev. B 1/05 EN
PIXCLK
CLKIN
The typical output delay, relative to the master clock edge, is 7.5 ns. Note that the data
outputs change on the falling edge of the master clock, with the pixel clock rising on the
subsequent rising edge of the master clock.
The LINE_VALID and FRAME_VALID signals change on the same falling master clock
edge as the data output. The LINE_VALID goes HIGH on the same falling master clock
edge as the output of the first valid pixel's data and returns LOW on the same master
clock falling edge as the end of the output of the last valid pixel's data.
As shown in the “Output Data Timing” on page 9, FRAME_VALID goes HIGH 6 pixel
clocks prior to the time that the first LINE_VALID goes HIGH. It returns LOW at a time
corresponding to 6 pixel clocks after the last LINE_VALID goes LOW.
FRAME_VALID
LINE_VALID
CLKIN
t PLH
D
P
OUT
t PLH
(9:0)
t PLH
D
,
t PHL
F,L
D
MT9V011 - 1/4-Inch VGA Digital Image Sensor
27
FRAME_VALID
D
LINE_VALID
Micron Technology, Inc., reserves the right to change products or specifications without notice.
OUT
CLKIN
(9:0)
t PHL
P
t PHL
t OH
Electrical Specifications
F,L
t R
©2004 Micron Technology, Inc. All rights reserved.
D
OUT
t F
(9:0)
Preliminary
‡