MT9V011P11STC:B Aptina LLC, MT9V011P11STC:B Datasheet - Page 14

• Manufacturer Part Number: MT9V011P11STC:B
• Description: SENSOR IMAGE VGA COLOR CMOS PLCC
• Manufacturer: Aptina LLC
• Series: DigitalClarity®, Micron®r
• Type: CMOS Imagingr

Specifications of MT9V011P11STC:B

• Pixel Size: 5.6µm x 5.6µm
• Active Pixel Array: 640H x 480V
• Frames Per Second: 30
• Voltage - Supply: 2.8V
• Package / Case: 28-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1315

Eight-Bit Write Sequence
Figure 11: Timing Diagram Showing a Write to Reg0x09 with the Value 0x0284
Eight-Bit Read Sequence
Figure 12: Timing Diagram Showing a Read from Reg0x09; Returned Value 0x0284
PDF: 817d5189/Source: 817d5173
MT9V011_C82S_2_PLCC.fm - Rev. B 1/05 EN
SDATA
SDATA
SDATA
SCLK
SCLK
SCLK
START
START
START
0xBA ADDR
0xBA ADDR
0xBA ADDR
ACK
To be able to write one byte at a time to the register a special register address is added.
The 8-bit write is done by first writing the upper eight bits to the desired register and
then writing the lower eight bits to the special register address (Reg0x80). The register is
not updated until all 16 bits have been written. It is not possible to just update half of a
register. In Figure 11 a typical sequence for 8-bit writing is shown. The second byte is
written to the special register (Reg 0x80).
To read one byte at a time the same special register address is used for the lower byte.
The upper eight bits are read from the desired register. By following this with a read from
the special register (Reg0x80) the lower eight bits are accessed (Figure 12). The master
sets the no-acknowledge bits shown.
Reg0x09
ACK
ACK
Two-wire Serial Interface Sample Read and Write Sequences
ACK
Reg0x09
Reg0x80
0000 0010
ACK
ACK
ACK
MT9V011 - 1/4-Inch VGA Digital Image Sensor
14
START
START
START
0xBA ADDR
0xBB ADDR
0xBB ADDR
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ACK
ACK
ACK
Reg0x80
ACK
0000 0010
1000 0100
©2004 Micron Technology, Inc. All rights reserved.
1000 0100
NACK
ACK
Preliminary
STOP
STOP
‡