PN5120A0HN1/C1 NXP Semiconductors, PN5120A0HN1/C1 Datasheet - Page 14

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PN5120A0HN1/C1

Manufacturer Part Number
PN5120A0HN1/C1
Description
RF Wireless Misc COMBO ANALOG/DIGI IC
Manufacturer
NXP Semiconductors
Type
Transmission Moduler
Datasheet

Specifications of PN5120A0HN1/C1

Package / Case
HVQFN EP
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 30 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PN5120A0HN1/C1,157

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NXP Semiconductors
111334
Product data sheet
8.2.1.3 CommIEnReg
Control bits to enable and disable the passing of interrupt requests.
Table 11.
Table 12.
Bit
7
6
5
4
3
2
1
0
Access
Rights
Symbol
IRqInv
TxIEn
RxIEn
IdleIEn
HiAlertIEn
LoAlertIEn Allows the low alert interrupt request (indicated by bit LoAlertIRq) to be
ErrIEn
TimerIEn
CommIEnReg register (address 02h); reset value: 80h, 10000000b
IRqInv
Description of CommIEnReg bits
r/w
7
Description
Set to logic 1, the signal on pin IRQ is inverted with respect to bit IRq in the
register Status1Reg. Set to logic 0, the signal on pin IRQ is equal to bit IRq.
In combination with bit IRqPushPull in register DivIEnReg, the default value
of 1 ensures, that the output level on pin IRQ is 3-state.
Allows the transmitter interrupt request (indicated by bit TxIRq) to be
propagated to pin IRQ.
Allows the receiver interrupt request (indicated by bit RxIRq) to be
propagated to pin IRQ.
Allows the idle interrupt request (indicated by bit IdleIRq) to be propagated to
pin IRQ.
Allows the high alert interrupt request (indicated by bit HiAlertIRq) to be
propagated to pin IRQ.
propagated to pin IRQ.
Allows the error interrupt request (indicated by bit ErrIRq) to be propagated
to pin IRQ.
Allows the timer interrupt request (indicated by bit TimerIRq) to be
propagated to pin IRQ.
TxIEn
Rev. 3.4 — 8 September 2009
r/w
6
RxIEn
r/w
5
IdleIEn
r/w
4
HiAlertIEn LoAlertIEn
r/w
3
r/w
2
Transmission Module
© NXP B.V. 2010. All rights reserved.
ErrIEn
r/w
1
PN512
TimerIEn
14 of 131
r/w
PUBLIC
0

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