PN5120A0HN1/C1 NXP Semiconductors, PN5120A0HN1/C1 Datasheet - Page 96

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PN5120A0HN1/C1

Manufacturer Part Number
PN5120A0HN1/C1
Description
RF Wireless Misc COMBO ANALOG/DIGI IC
Manufacturer
NXP Semiconductors
Type
Transmission Moduler
Datasheet

Specifications of PN5120A0HN1/C1

Package / Case
HVQFN EP
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 30 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PN5120A0HN1/C1,157

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NXP Semiconductors
17. Reset and Oscillator start up time
111334
Product data sheet
17.1 Reset timing requirements
17.2 Oscillator start up time
The reset signal is filtered by a hysteresis circuit and a spike filter (rejects signals shorter
than 10 ns) before it enters the digital circuit. In order to perform a reset, the signal has to
be low for at least 100 ns.
Having set the PN512 to a Power-down mode or supplying the IC with XVDD the following
figure describes the startup timing for the oscillator.
The time t
start-up time is defined by the crystal itself.
The t
before the PN512 can be addressed. The delay time is calculated as follows:
t
The time t
delay
Device Activation
Fig 36. Oscillator Start up time
Clock Stable
Clock Ready
delay
[μs] = 1024/27.12 = 37.76 μs.
Oscillator
defines the internal delay time of the PN512 when the clock signal is stable
startup
osc
is defined as the sum of the time t
defines the start-up time of crystal oscillator circuit. The crystal oscillator
Rev. 3.4 — 8 September 2009
t startup
t osc
delay
and t
startup
.
Transmission Module
© NXP B.V. 2010. All rights reserved.
t delay
PN512
96 of 131
PUBLIC
t

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