PN5120A0HN1/C1 NXP Semiconductors, PN5120A0HN1/C1 Datasheet - Page 40

• Manufacturer Part Number: PN5120A0HN1/C1
• Description: RF Wireless Misc COMBO ANALOG/DIGI IC
• Manufacturer: NXP Semiconductors
• Type: Transmission Moduler

Specifications of PN5120A0HN1/C1

• Package / Case: HVQFN EP
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 30 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PN5120A0HN1/C1,157

NXP Semiconductors
111334
Product data sheet
8.2.3.1 PageReg
8.2.3.2 CRCResultReg
8.2.3 Page 2: Configuration
Selects the register page.
Table 69.
Table 70.
Shows the actual MSB and LSB values of the CRC calculation.
Note: The CRC is split into two 8-bit register.
Note: Setting the bit MSBFirst in ModeReg register reverses the bit order, the byte order is
not changed.
Table 71.
Table 72.
Table 73.
Table 74.
Bit
7
6 to 2
1 to 0
Bit
7 to 0
Bit
7 to 0
Access Rights
Access Rights
Access Rights
Symbol
UsePageSelect Set to logic 1, the value of PageSelect is used as register address A5
-
PageSelect
Symbol
CRCResultMSB
Symbol
CRCResultLSB
PageReg register (address 20h); reset value: 00h, 00000000b
Description of PageReg bits
CRCResultReg register (address 21h); reset value: FFh, 11111111b
Description of CRCResultReg bits
CRCResultReg register (address 22h); reset value: FFh, 11111111b
Description of CRCResultReg bits
UsePageSelect
7
7
r
r
Rev. 3.4 — 8 September 2009
r/w
7
Description
and A4. The LSB-bits of the register address are defined by the
address pins or the internal address latch, respectively.
Set to logic 0, the whole content of the internal address latch defines
the register address. The address pins are used as described in
Section 10.1 “Automatic host controller interface type
Reserved for future use.
The value of PageSelect is used only if UsePageSelect is set to
logic 1. In this case, it specifies the register page (which is A5 and
A4of the register address).
Description
This register shows the actual value of the most significant byte of
the CRCResultReg register. It is valid only if bit CRCReady in
register Status1Reg is set to logic 1.
Description
This register shows the actual value of the least significant byte of
the CRCResult register. It is valid only if bit CRCReady in register
Status1Reg is set to logic 1.
6
6
r
r
RFU
6
0
5
5
r
r
RFU
5
0
CRCResultMSB
CRCResultLSB
4
4
r
r
RFU
4
0
3
3
r
r
RFU
3
0
2
2
r
r
Transmission Module
RFU
2
0
© NXP B.V. 2010. All rights reserved.
detection”.
1
1
r
r
PN512
r/w
PageSelect
1
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r/w
0
0
r
r
0