PN5120A0HN1/C1 NXP Semiconductors, PN5120A0HN1/C1 Datasheet - Page 46

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PN5120A0HN1/C1

Manufacturer Part Number
PN5120A0HN1/C1
Description
RF Wireless Misc COMBO ANALOG/DIGI IC
Manufacturer
NXP Semiconductors
Type
Transmission Moduler
Datasheet

Specifications of PN5120A0HN1/C1

Package / Case
HVQFN EP
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 30 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PN5120A0HN1/C1,157

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NXP Semiconductors
111334
Product data sheet
Table 90.
Table 91.
Table 92.
Bit
6 to 5
4
3 to 0
Bit
7 to 0
Access
Rights
Symbol
TGated
TAutoRestart
TPrescaler_Hi Defines higher 4 bits for TPrescaler.
Symbol
TPrescaler_Lo Defines lower 8 bits for TPrescaler.
Description of TModeReg bits
TPrescalerReg register (address 2Bh); reset value: 00h, 00000000b
Description of TPrescalerReg bits
r/w
7
Rev. 3.4 — 8 September 2009
r/w
Description
The internal timer is running in gated mode.
Note: In the gated mode, the bit TRunning is 1 when the timer is enabled
by the register bits. This bit does not influence the gating signal.
Value
00
01
10
11
Set to logic 1, the timer automatically restart its count-down from
TReloadValue, instead of counting down to zero.
Set to logic 0 the timer decrements to ZERO and the bit TimerIRq is set
to logic 1.
The following formula is used to calculate f
Where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo] (TPrescaler value
on 12 bits)
For detailed description see
6
f
Description
The following formula is used to calculate f
Where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo] (TPrescaler value
on 12 bits)
For detailed description see
Timer
f
Timer
= 13.56 MHz/(2*TPreScaler+1).
Description
Non gated mode
Gated by SIGIN
Gated by AUX1
Gated by A3
= 13.56 MHz/(2*TPreScaler+1).
r/w
5
…continued
TPrescaler_Lo
r/w
4
Section 13 “Timer
Section 13 “Timer
r/w
3
Timer
r/w
2
Timer
unit”.
:
Transmission Module
unit”.
:
© NXP B.V. 2010. All rights reserved.
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