PN5120A0HN1/C1 NXP Semiconductors, PN5120A0HN1/C1 Datasheet - Page 71

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PN5120A0HN1/C1

Manufacturer Part Number
PN5120A0HN1/C1
Description
RF Wireless Misc COMBO ANALOG/DIGI IC
Manufacturer
NXP Semiconductors
Type
Transmission Moduler
Datasheet

Specifications of PN5120A0HN1/C1

Package / Case
HVQFN EP
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 30 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PN5120A0HN1/C1,157

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NXP Semiconductors
111334
Product data sheet
10.4.2 Data validity
10.4.3 START and STOP conditions
Data on the SDA line shall be stable during the HIGH period of the clock. The HIGH or
LOW state of the data line shall only change when the clock signal on SCL is LOW.
To handle the data transfer on the I
are defined.
A START condition is defined with a HIGH to LOW transition on the SDA line while SCL is
HIGH.
A STOP condition is defined with a LOW to HIGH transition on the SDA line while SCL is
HIGH.
The master always generates the START and STOP conditions. The bus is considered to
be busy after the START condition. The bus is considered to be free again a certain time
after the STOP condition.
The bus stays busy if a repeated START (Sr) is generated instead of a STOP condition. In
this respect, the START (S) and repeated START (Sr) conditions are functionally identical.
Fig 18. Bit transfer on the I
Fig 19. START and STOP conditions
Rev. 3.4 — 8 September 2009
2
C-bus
2
C-bus, unique START (S) and STOP (P) conditions
Transmission Module
© NXP B.V. 2010. All rights reserved.
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