82P2288BB8 IDT, Integrated Device Technology Inc, 82P2288BB8 Datasheet - Page 11

82P2288BB8

Manufacturer Part Number
82P2288BB8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82P2288BB8

Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
FEATURES
LINE INTERFACE
FRAMER
The IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
 2008 Integrated Device Technology, Inc.
• Each link can be configured as T1, E1 or J1
• Supports T1/E1/J1 long haul/short haul line interface
• HPS for 1+1 protection without external relays
• Receive sensitivity exceeds -36 dB @ 772 Hz and -43 dB @ 1024
• Selectable internal line termination impedance: 100 Ω (for T1), 75
• Supports AMI/B8ZS (for T1/J1) and AMI/HDB3 (for E1) line encod-
• Provides T1/E1/J1 short haul pulse templates, long haul LBO (per
• Supports G.772 non-intrusive monitoring
• Supports T1.102 line monitor
• Transmit line short-circuit detection and protection
• Separate Transmit and Receive Jitter Attenuators (2 per link)
• Indicates the interval between the write pointer and the read
• Loss of signal indication with programmable thresholds according
• Supports Analog Loopback, Digital Loopback and Remote Loop-
• Each receiver and transmitter can be individually powered down
• Each link can be configured as T1, E1 or J1
• Frame alignment/generation for T1 (per ITU-T G.704, TA-TSY-
• Supports T1/J1 Super Frame and Extended Super Frame, T1 Dig-
• Signaling extraction/insertion for CAS and RBS signaling
• Provides programmable system interface supporting Mitel
Hz
Ω / 120 Ω (for E1) and 110 Ω (for J1)
ing/decoding
ANSI T1.403 and FCC68: 0 dB, -7.5 dB, -15 dB, -22 dB) and user-
programmable arbitrary pulse template
pointer of the FIFO in JA
to ITUT-T G.775, ETS 300 233 (E1) and ANSI T1.403 (T1/J1)
back
000278, TR-TSY-000008), E1 (per ITU-T G.704), J1 (per JT
G.704) and un-framed mode
ital Multiplexer and Switch Line Carrier - 96, E1 CRC Multi-frame
and Signaling Multi-frame
bus, AT&T
1.544 Mb/s or 2.048 Mb/s non-multiplexed bus
TM
CHI and MVIP bus, 8.192 Mb/s multiplexed bus and
Octal T1/E1/J1 Long Haul /
Short Haul Transceiver
TM
ST-
11
CONTROL INTERFACE
GENERAL
APPLICATIONS
• Supports Serial Peripheral Interface (SPI) microprocessor and par-
• Global hardware and software reset
• Two general purpose I/O pins
• Per link power down
• Flexible reference clock (N x 1.544 MHz or N x 2.048 MHz)
• JTAG boundary scan
• 3.3 V I/O with 5 V tolerant inputs
• Low power consumption (Typical 900 mW)
• 3.3 V and 1.8 V power supply
• 256-pin PBGA package
• C.O, PABX, ISDN PRI
• Wireless Base Stations
• T1/E1/J1 ATM Gateways, Multiplexer
• T1/E1/J1 Access Networks
• LAN/WAN Router
• Digital Cross Connect
• SONET/SDH Add/Drop Equipment
• Three HDLC controllers per link with separate 128-byte transmit
• Programmable bit insertion and bit inversion on per channel/
• Provides Bit Oriented Message (BOM) generation and detection
• Provides Automatic Performance Report Message (APRM) gener-
• Detects and generates alarms (AIS, RAI)
• Provides performance monitor to count Bipolar Violation error,
• Supports System Loopback, Payload Loopback, Digital Loopback
• Detects and generates selectable PRBS and QRSS
and receive FIFOs per controller
timeslot basis
ation
Excess Zero error, CRC error, framing bit error, far end CRC error,
out of frame and change of framing alignment position
and Inband Loopback
allel Intel/Motorola non-multiplexed microprocessor interface
(0<N<5)
IDT82P2288
March 04, 2009
DSC-6044/6

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