82P2288BB8 IDT, Integrated Device Technology Inc, 82P2288BB8 Datasheet - Page 18

• Manufacturer Part Number: 82P2288BB8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2288BB8

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

Pin Description
IDT82P2288
D[0] / SDO
GPIO[0]
GPIO[1]
RESET
Name
REFR
A[10]
MPM
THZ
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
A[0]
A[1]
A[2]
A[3]
A[4]
A[5]
A[6]
A[7]
A[8]
A[9]
INT
CS
Output / Input
Output / Input
Output
Output
Type
Input
Input
Input
Input
Input
Pin No.
D13
C16
M10
R10
M11
A14
E13
B16
R11
T10
P10
T11
M7
M8
M9
N7
P7
R7
N8
P8
R8
P9
N9
R9
T7
T8
T9
RESET: Reset (Active Low)
A low pulse for more than 100 ns on this pin resets the device. All the registers are accessible 2 ms after the reset.
The RESET pin is a Schmitt-trigger input with a weak pull-up resistor. The OSCI clock must exist when the device is
reset.
General Purpose I/O [1:0]
These two pins can be defined as input pins or output pins by the DIR[1:0] bits (b1~0, T1/J1-006H / b1~0, E1-006H)
respectively. When the pins are input, their polarities are indicated by the LEVEL[1:0] bits (b3~2, T1/J1-006H / b3~2,
E1-006H) respectively. When the pins are output, their polarities are controlled by the LEVEL[1:0] bits (b3~2, T1/J1-
006H / b3~2, E1-006H) respectively.
GPIO[1:0] are Schmitt-trigger input/output with a pull-up resistor.
THZ: Transmit High-Z
A high level on this pin puts all the TTIPn/TRINGn pins into high impedance state.
THZ is a Schmitt-trigger input.
INT: Interrupt (Active Low)
This is the open drain, active low interrupt output. This pin will stay low until all the active unmasked interrupt indica-
tion bits are cleared.
REFR:
This pin should be connected to ground via an external 10K resistor.
CS: Chip Select (Active Low)
This pin must be asserted low to enable the microprocessor interface. The signal must be asserted high at least
once after power up to clear the internal test modes. A transition from high to low must occur on this pin for each
Read/Write operation and can not return to high until the operation is completed.
CS is a Schmitt-trigger input.
A[10:0]: Address Bus
In parallel mode, the signals on these pins select the register for the microprocessor to access.
In SPI mode, these pins should be connected to ground.
A[10:0] are Schmitt-trigger inputs.
D[7:0]: Bi-directional Data Bus
In parallel mode, the signals on these pins are the data for Read / Write operation.
In SPI mode, the D[7:1] pins should be connected to the ground through a 10 K resistor.
D[7:0] are Schmitt-trigger inputs/outputs.
SDO: Serial Data Output
In SPI mode, the data is serially output on this pin.
MPM: Micro Controller Mode
In parallel mode, set this pin low for Motorola mode or high for Intel mode.
In SPI mode, set this pin to a fixed level (high or low). This pin is useless in SPI mode.
MPM is a Schmitt-trigger input.
Control Interface
18
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Description
March 04, 2009