DJLXT380LE.B4 Cortina Systems Inc, DJLXT380LE.B4 Datasheet - Page 3

• Manufacturer Part Number: DJLXT380LE.B4
• Manufacturer: Cortina Systems Inc

Specifications of DJLXT380LE.B4

• Lead Free Status / RoHS Status: Not Compliant

Contents
1.0
2.0
3.0
4.0
5.0
Datasheet
Pin Assignments and Signal Descriptions
Functional Description
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
Register Descriptions
JTAG Boundary Scan
4.1
4.2
4.3
4.4
Test Specifications
5.1
Initialization..........................................................................................................21
2.1.1
Receiver ..............................................................................................................21
2.2.1
In Service Code Violation Monitoring ..................................................................22
Transmitter ..........................................................................................................23
2.4.1
Line Protection ....................................................................................................24
Driver Failure Monitor..........................................................................................25
Loopbacks ...........................................................................................................25
2.7.1
2.7.2
2.7.3
2.7.4
G.772 Monitoring.................................................................................................28
Hitless Protection Switching (HPS) .....................................................................28
Operation Mode Summary ..................................................................................28
Interfacing with 5V logic ......................................................................................29
Parallel Host Interface .........................................................................................29
2.12.1 Motorola Interface ..................................................................................30
2.12.2 Intel Interface..........................................................................................30
Interrupt Handling................................................................................................31
2.13.1 Interrupt Sources....................................................................................31
2.13.2 Interrupt Enable......................................................................................31
2.13.3 Interrupt Clear ........................................................................................31
Serial Host Mode.................................................................................................32
Overview .............................................................................................................37
Architecture .........................................................................................................37
TAP Controller.....................................................................................................38
JTAG Register Description..................................................................................40
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
Recommendations and Specifications ................................................................65
Reset Operation .....................................................................................21
Loss Of Signal Detector .........................................................................22
2.2.1.1 Clock and Data Recovery Mode................................................22
2.2.1.2 Data Recovery Mode.................................................................22
Transmit Pulse Shaping .........................................................................23
Analog Loopback....................................................................................25
Digital Loopback.....................................................................................26
Remote Loopback ..................................................................................26
Transmit All Ones (TAOS)......................................................................27
Boundary Scan Register, BSR ...............................................................40
Device Identification Register, IDR.........................................................43
Bypass Register, BYR............................................................................43
Analog Port Scan Register, ASR............................................................44
Instruction Register, IR...........................................................................45
..................................................................................................46
.............................................................................................33
.............................................................................................37
...........................................................................................21
Octal E1 Line Interface Unit — LXT380
...................................................... 9
3