DJLXT380LE.B4 Cortina Systems Inc, DJLXT380LE.B4 Datasheet - Page 51

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DJLXT380LE.B4

Manufacturer Part Number
DJLXT380LE.B4
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of DJLXT380LE.B4

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DJLXT380LE.B4
Manufacturer:
Intel
Quantity:
10 000
Datasheet
Table 30. Receive Transmission Characteristics (Continued)
Table 31. Analog Test Port Characteristics
Table 32. Transmit Timing Characteristics
LOS delay time
LOS reset
Receive intrinsic jitter
† Guaranteed by design and other correlation methods.
3 dB bandwidth
Input voltage range
Output voltage range
Master clock frequency
Master clock tolerance
Master clock duty cycle
Output pulse width
Transmit clock frequency
Transmit clock tolerance
Transmit clock duty cycle
TPOS/TNEG pulse width (RZ
mode)
TPOS/TNEG to TCLK setup
time
TCLK to TPOS/TNEG hold
time
Delay time OE Low to driver
High Z
Delay time TCLK Low to driver
High Z
Parameter
Parameter
Parameter
at13db
MCLK
MCLK
TCLtK
TCLKt
at2ov
t
Sym
at1iv
Sym
Sym
t
t
MPW
TW
t
SUT
t
OEZ
t
DC
HT
TZ
Min.
Min.
-100
Min.
219
236
-50
40
10
20
20
10
0
0
8
2.048
2.048
0.020
Typ.
Typ.
Typ.
244
30
5
Octal E1 G.703 Transceiver — LXT380
VCC0
VCC1
VCC0
VCC1
0.032
Max.
Max.
Max.
100
269
+50
252
255
60
90
15
1
marks
MHz
MHz
MHz
Unit
Unit
ppm
ppm
Unit
U.I.
ns
ns
ns
ns
µs
%
%
V
V
s
s
NRZ mode
RZ mode (TCLK = H for >16
clock cycles)
Data recovery mode
Data recovery mode
Test Condition
Test Condition
Test Condition
51

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