DJLXT380LE.B4 Cortina Systems Inc, DJLXT380LE.B4 Datasheet - Page 34

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DJLXT380LE.B4

Manufacturer Part Number
DJLXT380LE.B4
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of DJLXT380LE.B4

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DJLXT380LE.B4
Manufacturer:
Intel
Quantity:
10 000
LXT380 — Octal E1 G.703 Transceiver
34
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Register Addresses and Bit Names (Continued)
ID Register (00H)
Analog Loopback Register (01H)
Remote Loopback Register (02H)
TAOS Enable Register (03H)
LOS Interrupt
Status
DFM Interrupt
Status
Software
Reset
Register
Performance
Monitoring
Digital
Loopback
LOS Criteria
Select
Automatic
TAOS Select
7-0
7-0
7-0
7-0
Bit
Bit
Bit
Bit
Name
RL7-RL0
AL7-AL0
TAOS7-
ID7-ID0
TAOS0
Name
Name
Name
Name
Register
MON
Sym
RES
LCS
ATS
DIS
LIS
DL
This register contains a unique revision code and is mask programmed.
Setting a bit to “1” enables analog loopback for transceivers 7–0 respectively.
Setting a bit to “1” enables remote loopback for transceivers 7–0 respectively.
Setting a bit to “1” causes a continuous stream of marks to be sent out at the TTIP and
TRING pins of the respective transceiver 7–0. MCLK is used as timing reference. If
MCLK is not available, the channel TCLK is used as the reference. On power up all
register bits are set to “0.”
Mode
R/W
R/W
R/W
R/W
R/W
R
R
served
RES7
LCS7
ATS7
DIS7
LIS7
DL7
re-
7
served
RES6
LCS6
ATS6
DIS6
LIS6
DL6
re-
6
served
RES5
LCS5
ATS5
DIS5
LIS5
DL5
re-
5
Function
Function
Function
Function
served
RES4
LCS4
ATS4
DIS4
LIS4
DL4
re-
4
Bit
RES3
LCS3
ATS3
DIS3
LIS3
DL3
A3
3
RES2
LCS2
ATS2
DIS2
LIS2
DL2
A2
2
RES1
LCS1
ATS1
DIS1
LIS1
DL1
A1
1
Datasheet
RES0
LCS0
ATS0
DIS0
LIS0
DL0
A0
0

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