IPSERIALLITE Altera, IPSERIALLITE Datasheet - Page 109
IPSERIALLITE
Manufacturer Part Number
IPSERIALLITE
Description
Manufacturer
Altera
Datasheet
1.IPSERIALLITE.pdf
(120 pages)
Specifications of IPSERIALLITE
Lead Free Status / RoHS Status
Not Compliant
- Current page: 109 of 120
- Download datasheet (2Mb)
SerialLite Testbench
Altera Corporation
August 2005
NumStreamTransactions
PriorityPacketLength
RegularPacketLength
Table 4–1. SerialLite IP Testbench Parameters (ModelSim Simulator) (Part 2 of 2)
Parameter
Other Simulators
If you are using a simulator other than the ModelSim tool, the
<variation name>_tb.v file contains the list of parameters to change and
their values. By editing these parameters according to the parameter
descriptions below, you change how simulation proceeds. Not all
parameters are available for any given link. For example, if you only
instantiate the priority data port, editing the parameter list for the regular
data port has no effect on the simulation.
w
Minimum
1 byte
1 byte
1
MegaCore Function Version 1.1.0
Do not delete any parameters from the parameter list.
65,535 bytes
65,535 bytes
Maximum
(2^32)-1
256 bytes
10 bytes
Default
12
SerialLite MegaCore Function User Guide
The number of streaming
transactions. Controls the number of
transactions sent by the Atlantic
generator to the regular data port. A
transaction is considered to be 256-
bytes of data.
Only applicable if the regular data port
is enabled and streaming mode is
selected.
The priority data packet size. Controls
the number of bytes in a packet sent
by the Atlantic generator to the priority
data port. If used, all packets are of
this size.
Applicable only if the priority data port
is enabled.
Note: The maximum packet size
supported by the priority port without
errors is 256 bytes. Setting the packet
size greater than 256 bytes results in
a testbench error.
The regular data packet size. Controls
the number of bytes in a packet sent
by the generator to the regular data
port. If used, all packets are of this
size.
Available only if the regular data port
is enabled and packet mode is
selected.
Description
4–5
Related parts for IPSERIALLITE
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: