IPSERIALLITE Altera, IPSERIALLITE Datasheet - Page 29

• Manufacturer Part Number: IPSERIALLITE
• Manufacturer: Altera

Specifications of IPSERIALLITE

• Lead Free Status / RoHS Status: Not Compliant

Getting Started
Simulate the
Design
Altera Corporation
August 2005
_sl_core.vo or
_sl_core.vho
_inst.vhd or _inst.v
_core_params.txt
_constraints.tcl
_tb.do
_tb_ae.do
_tb.v
_vsim_arg.txt
_vlog_arg.txt
_tb_params.txt
.inc
Table 2–1. IP Toolbench-Generated Files (Part 2 of 2)
Extension
f
VHDL or Verilog HDL IP functional simulation model.
VHDL or Verilog HDL sample instantiation file.
SerialLite MegaCore function configuration information for use by the testbench.
Tcl script for applying virtual pin constraints when compiling the SerialLite MegaCore
function by itself.
SerialLite testbench script. Used for simulating a SerialLite MegaCore function
variation using the SerialLite testbench in the Model Technology ModelSim (standard
edition) simulation tool.
SerialLite testbench script. Used for simulating a SerialLite MegaCore function
variation using the SerialLite testbench in the Model Technology ModelSim-Altera
simulation tool.
SerialLite testbench top-level file. Used when simulating a SerialLite MegaCore
function variation using the SerialLite testbench.
ModelSim simulation arguments file. Used when simulating a SerialLite MegaCore
function variation using the SerialLite testbench.
ModelSim compilation arguments file. Used when simulating a SerialLite MegaCore
function variation using the SerialLite testbench.
SerialLite testbench parameter file. You change parameter values in this file to control
testbench behavior.
An AHDL
file with any AHDL architecture that instantiates the MegaCore function.
You can now integrate your custom megafunction variation into your
design and simulate and compile.
You can simulate your design using IP Toolbench-generated VHDL and
Verilog HDL IP functional simulation models.
For more information on IP functional simulation models, see the
Simulating Altera in Third-Party Simulation Tools chapter in Volume 3 of
the Quartus II Handbook.
Altera also provides a configurable testbench for use in evaluating the
SerialLite MegaCore function. The testbench is described in detail in
Chapter 4, SerialLite
include
MegaCore Function Version 1.1.0
declaration file for the MegaCore function variation. Include this
Testbench.
Description
SerialLite MegaCore Function User Guide
2–17