EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 678

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Introduction
Figure 9–6. Framer Receiver Interface in Stratix & Stratix GX Devices
Note to
(1)
9–8
Stratix Device Handbook, Volume 2
Stratix & Stratix GX SFI-4 Receiver
The figure shows Stratix GX DPA disabled.
Stratix & Stratix GX
Figure
Logic Array
9–6:
f
Fast PLL
8
8
For more information on the byte-alignment feature in Stratix and
Stratix GX devices, see the High-Speed Differential I/O Interfaces in Stratix
Devices chapter in the Stratix Device Handbook or the Stratix GX Device
Handbook.
Stratix & Stratix GX SERDES
÷J
Register
Parallel
622 MHz
× W
Serial-to-Parallel
Register
W = 1
CH15
J = 8
CH0
RXDATA[15]
RXDATA[0]
622 Mbps
622 MHz
RXCLK
Altera Corporation
SERDES
OC-192
July 2005