Z8038018FSG Zilog, Z8038018FSG Datasheet - Page 121

• Manufacturer Part Number: Z8038018FSG
• Description: IC 16 BIT Z80 MPU 100-QFP
• Manufacturer: Zilog

Specifications of Z8038018FSG

• Processor Type: Z380
• Features: 16-Bit, High-Performance Enhanced Z80 CPU
• Speed: 18MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Processor Series: Z80380x
• Core: Z380
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 18 MHz
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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6A
6B
6C
6D
6E
6F
70
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7A
7B
7C
7D
7E
7F
80
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89
8A
8B
8C
8D
8E
8F
90
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97
no esc
LD H,(HL)
LD H,A
LD L,B
LD L,C
LD L,D
LD L,E
LD L,H
LD L,L
LD L,(HL)
LD L,A
LD (HL),B
LD (HL),C
LD (HL),D
LD (HL),E
LD (HL),H
LD (HL),L
HALT
LD (HL),A
LD A,B
LD A,C
LD A,D
LD A,E
LD A,H
LD A,L
LD A,(HL)
LD A,A
ADD A,B
ADD A,C
ADD A,D
ADD A,E
ADD A,H
ADD A,L
ADD A,(HL)
ADD A,A
ADC A,B
ADC A,C
ADC A,D
ADC A,E
ADC A,H
ADC A,L
ADC A,(HL)
ADC A,A
SUB B
SUB C
SUB D
SUB E
SUB H
SUB L
SUB (HL)
SUB A
ED esc
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RRD
IN L,(C)
OUT (C),L
ADC HL,HL
LD HL,(nn)
MLT HL
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RLD
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OUT (C),n
SBC HL,SP
LD (nn),SP
TSTIO m
EXTSW
SLP
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IN A,(C)
OUT (C),A
ADC HL,SP
LD SP,(nn)
MLT SP
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ADD SP,nn **
OTIM
ADDW BC
ADDW DE
ADDW nn
ADDW HL
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OTDM
ADCW BC
ADCW DE
ADCW nn
ADCW HL
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SUB SP,nn **
OTIMR
SUBW BC
SUBW DE
SUBW nn
SUBW HL
DD esc
LD H,(IX+d)
LD IXU,A
LD IXL,B
LD IXL,C
LD IXL,D
LD IXL,E
LD IXL,IXU
LD IXL,IXL
LD L,(IX+d)
LD IXL,A
LD (IX+d),B
LD (IX+d),C
LD (IX+d),D
LD (IX+d),E
LD (IX+d),H
LD (IX+d),L
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LD (IX+d),A
INW HL,(C)
OUTW (C),HL
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LD A,IXU
LD A,IXL
LD A,(IX+d)
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ADD IXU
ADD IXL
ADD A,(IX+d)
ADDW IX
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ADC A,IXU
ADC A,IXL
ADC A,(IX+d)
ADCW IX
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SUB IXU
SUB IXL
SUB (IX+d)
SUBW IX
FD esc
LD H,(IY+d)
LD IYU,A
LD IYL,B
LD IYL,C
LD IYL,D
LD IYL,E
LD IYL,IYU
LD IYL,IYL
LD L,(IY+d)
LD IYL,A
LD (IY+d),B
LD (IY+d),C
LD (IY+d),D
LD (IY+d),E
LD (IY+d),H
LD (IY+d),L
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LD (IY+d),A
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LD A,IYU
LD A,IYL
LD A,(IY+d)
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ADD IYU
ADD IYL
ADD A,(IY+d)
ADDW IY
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ADC A,IYU
ADC A,IYL
ADC A,(IY+d)
ADCW IY
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SUB IYU
SUB IYL
SUB (IY+d)
SUBW IY
OUTW (C),nn
CB esc
BIT 4,(HL)
BIT 4,A
BIT 5,B
BIT 5,C
BIT 5,D
BIT 5,E
BIT 5,H
BIT 5,L
BIT 5,(HL)
BIT 5,A
BIT 6,B
BIT 6,C
BIT 6,D
BIT 6,E
BIT 6,H
BIT 6,L
BIT 6,(HL)
BIT 6,A
BIT 7,B
BIT 7,C
BIT 7,D
BIT 7,E
BIT 7,H
BIT 7,L
BIT 7,(HL)
BIT 7,A
RES 0,B
RES 0,C
RES 0,D
RES 0,E
RES 0,H
RES 0,L
RES 0,(HL)
RES 0,A
RES 1,B
RES 1,C
RES 1,D
RES 1,E
RES 1,H
RES 1,L
RES 1,(HL)
RES 1,A
RES 2,B
RES 2,C
RES 2,D
RES 2,E
RES 2,H
RES 2,L
RES 2,(HL)
RES 2,A
ED-CB
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MULTW BC
MULTW DE
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MULTW HL
MULTW IX
MULTW IY
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MULTW nn
DD-CB
BIT 4,(IX+d)
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BIT 5,(IX+d)
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BIT 6,(IX+d)
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BIT 7,(IX+d)
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RES 0,(IX+d)
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RES 1,(IX+d)
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MULTW (IX+d)
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RES 2,(IX+d)
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Page 121 of 125
FD-CB
BIT 4,(IY+d)
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BIT5,(IY+d)
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BIT 6,(IY+d)
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BIT 7,(IY+d)
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RES 0,(IY+d)
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RES 1,(IY+d)
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MULTW (IY+d)
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RES 2,(IY+d)
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