Z8038018FSG Zilog, Z8038018FSG Datasheet - Page 97
Z8038018FSG
Manufacturer Part Number
Z8038018FSG
Description
IC 16 BIT Z80 MPU 100-QFP
Manufacturer
Zilog
Specifications of Z8038018FSG
Processor Type
Z380
Features
16-Bit, High-Performance Enhanced Z80 CPU
Speed
18MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
100-QFP
Processor Series
Z80380x
Core
Z380
Program Memory Size
64 KB
Maximum Clock Frequency
18 MHz
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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MEMORY CHIP SELECTS AND WAITS
The Z380 MPU offers two schemes to generate chip select
signals to access the lowest 16 Mbytes of its memory
address space. The first scheme provides six chip select
signals, with the address space partitioned as shown in
Figure 30. The second scheme provides three chip select
signals, and the address space partitioning is shown in
Figure 31. Note that the /MCS0 signal is used to indicate
accesses to the entire mid-range memory in the second
scheme.
Figure 30. Chip Select Address Space
00FFFFFF
00000000
/UMCS
/MCS3
/MCS2
/MCS1
/MCS0
/LMCS
Memory Chip Select Scheme 1
Mid-range
Memory3
Mid-range
Memory2
Mid-range
Memory1
Mid-range
Memory0
Memory
Memory
Upper
Unused
Lower
Unused
A flexible wait state insertion scheme is incorporated in the
chip select logic. A user can program T1, T2 and T3 waits
separately for accesses to the lower, upper and mid-range
memory areas. If chip select scheme one is in effect,
different wait states can be defined for each of the mid-
range memory areas 3 through 0.
Figure 31. Chip Select Address Space
00FFFFFF
00000000
/UMCS
/MCS
/LMCS
Memory Chip Select Scheme 2
Mid-range
Memory
Memory
Memory
Upper
Lower
Page 97 of 125
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