DS33R41+ Maxim Integrated Products, DS33R41+ Datasheet - Page 141

• Manufacturer Part Number: DS33R41+
• Description: IC TXRX ETHERNET MAP 400-BGA
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS33R41+

• Number Of Drivers/receivers: 4/4
• Protocol: T1/E1/J1
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit 3: Wrap Type (WT). This bit is used to configure the wrap mode.
Bits 2 to 0: Burst Length 2 through 0 (BL2 to BL0). These bits are used to determine the Burst Length.
Note: This register has a non-zero default value. This should be taken into consideration when initializing
the device.
Note: After changing the value of this register, the user must toggle the GL.SDMODEWS.SDMW bit to write
the new values to the SDRAM.
Register Name:
Register Description:
Register Address:
Bits 2 to 0: CAS Latency Mode (LTMOD2 to LTMOD0). These bits are used to setup CAS Latency. Note: Only
CAS Latency of 2 or 3 is allowed.
Note: This register has a non-zero default value. This should be taken into consideration when initializing
the device.
Note: After changing the value of this register, the user must toggle the GL.SDMODEWS.SDMW bit to write
the new values to the SDRAM.
Register Name:
Register Description:
Register Address:
Bit 0: SDRAM Mode Write (SDMW). Setting this bit to 1 will write the current values of the mode control and
refresh time control registers to the SDRAM. The user must clear this bit and set it again for subsequent write
operations.
Bit #
Name
Default
Bit #
Name
Default
Bit #
Name
Default
0 = Sequential
1 = Interleave
—
—
7
0
7
0
—
7
0
—
—
6
0
6
0
—
6
0
GL.SDMODE1
Global SDRAM Mode Register 1
3Ah
GL.SDMODE2
Global SDRAM Mode Register 2
3Bh
GL.SDMODEWS
Global SDRAM Mode Register Write Status
3Ch
—
—
5
0
5
0
—
5
0
141 of 335
—
—
4
0
4
0
—
0
4
WT
—
—
3
0
3
0
3
0
LTMOD2
BL2
—
2
0
2
0
2
0
LTMOD1
BL1
—
1
1
1
1
1
0
LTMOD0
SDMW
BL0
0
1
0
0
0
0