DS33R41+ Maxim Integrated Products, DS33R41+ Datasheet - Page 65

IC TXRX ETHERNET MAP 400-BGA

DS33R41+

Manufacturer Part Number
DS33R41+
Description
IC TXRX ETHERNET MAP 400-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R41+

Number Of Drivers/receivers
4/4
Protocol
T1/E1/J1
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 9-14. X.86 Encapsulation of the MAC field
The device will encode the MAC Frame with the LAPS encapsulation on a complete serial stream if configured for
X.86 mode in the register LI.TX86E. The device provides the following functions:
The sequence of processing performed by the receiver is as follows:
Control Registers for Address, SAPI, Destination Address, Source Address
32 bit FCS enabled
Programmable X
Programmable octets X
Detect the Start Flag (7E)
Remove Rate adaptation octets 7d, dd.
Perform transparency-processing 7d, 5e is converted to 7e and 7d, 5d is converted to 7d.
Check for a valid Address, Control and SAPI fields
Perform FCS checking
Detect the closing flag.
MSB
2nd Octect of SAPI(0x01)
1st Octect of SAPI(0xfe)
Destination Adrs(DA)
Source Adrs(SA)
MAC Client Data
43
Address(0x04)
FCS for LAPS
Control(0x03)
FCS for MAC
+1 scrambling
Length/Type
Flag(0x7E)
Flag(0x7E)
PAD
43
+1 descrambling
Number of Bytes
LSB
46-1500
65 of 335
2
4
4
1
1
1
1
1
6
6
(LI.TRX86A
to LI.TRX86SAPIL)

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