DS33R41+ Maxim Integrated Products, DS33R41+ Datasheet - Page 299

IC TXRX ETHERNET MAP 400-BGA

DS33R41+

Manufacturer Part Number
DS33R41+
Description
IC TXRX ETHERNET MAP 400-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS33R41+

Number Of Drivers/receivers
4/4
Protocol
T1/E1/J1
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 13-12. Transmit Side 1.544MHz Boundary Timing (With Elastic Store Enabled)
NOTE:
1) TCHBLK is programmed to block channel 24 (if the TPCSI bit is set, then the signaling data at TSIG will be
Figure 13-13. Transmit Side 2.048MHz Boundary Timing (With Elastic Store Enabled)
NOTES:
1) TSERI data in channels 1, 5, 9, 13, 17, 21, 25, and 29 is ignored.
2) TCHBLK is programmed to block channel 31 (if the TPCSI bit is set, then the signaling data at TSIG will be
3) TCHBLK is forced to one in the same channels as TSERI is ignored (Note 1).
4) The F-bit position for the T1 frame is sampled and passed through the transmit side elastic store into the MSB
ignored during channel 24).
ignored).
bit position of channel 1. (Normally the transmit side formatter overwrites the F-bit position unless the formatter
is programmed to pass-through the F-bit position).
TCHBLK
TSYSCLK
TCHBLK
TCHCLK
TSYSCLK
TSSYNC
TSSYNC
TCHCLK
TSERI
TSERI
TSIG
TSIG
2,3
1
1
CHANNEL 23
CHANNEL 23
CHANNEL 31
CHANNEL 31
A
A
B
B
C/A D/B
C/A D/B
LSB MSB
LSB MSB
299 of 335
CHANNEL 24
CHANNEL 24
CHANNEL 32
CHANNEL 32
A
A
B
B
C/A D/B
C/A D/B
LSB
LSB
F MSB
F
4
CHANNEL 1
CHANNEL 1
CHANNEL 1
CHANNEL 1
A
A

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