PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 35

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PIC17C756A-33/L

Manufacturer Part Number
PIC17C756A-33/L
Description
68 PIN, 32 KB OTP, 902 RAM, 50 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC17C756A-33/L

A/d Inputs
12-Channel, 10-Bit
Cpu Speed
8.25 MIPS
Eeprom Memory
0 Bytes
Input Output
52
Interface
I2C/SPI/USART
Memory Type
OTP
Number Of Bits
8
Package Type
68-pin PLCC
Programmable Memory
32K Bytes
Ram Size
902 Bytes
Speed
16 MHz
Timers
2-8-bit, 2-16-bit
Voltage, Range
3-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

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6.2
These registers contains the individual enable bits for
the peripheral interrupts.
REGISTER 6-2: PIE1 REGISTER (ADDRESS: 17h, BANK 1)
2000 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Peripheral Interrupt Enable
Register1 (PIE1) and Register2
(PIE2)
Legend:
R = Readable bit
- n = Value at POR Reset
bit 7
RBIE: PORTB Interrupt-on-Change Enable bit
1 = Enable PORTB interrupt-on-change
0 = Disable PORTB interrupt-on-change
TMR3IE: TMR3 Interrupt Enable bit
1 = Enable TMR3 interrupt
0 = Disable TMR3 interrupt
TMR2IE: TMR2 Interrupt Enable bit
1 = Enable TMR2 interrupt
0 = Disable TMR2 interrupt
TMR1IE: TMR1 Interrupt Enable bit
1 = Enable TMR1 interrupt
0 = Disable TMR1 interrupt
CA2IE: Capture2 Interrupt Enable bit
1 = Enable Capture2 interrupt
0 = Disable Capture2 interrupt
CA1IE: Capture1 Interrupt Enable bit
1 = Enable Capture1 interrupt
0 = Disable Capture1 interrupt
TX1IE: USART1 Transmit Interrupt Enable bit
1 = Enable USART1 Transmit buffer empty interrupt
0 = Disable USART1 Transmit buffer empty interrupt
RC1IE: USART1 Receive Interrupt Enable bit
1 = Enable USART1 Receive buffer full interrupt
0 = Disable USART1 Receive buffer full interrupt
R/W-0
RBIE
TMR3IE
R/W-0
TMR2IE
R/W-0
W = Writable bit
’1’ = Bit is set
TMR1IE
R/W-0
R/W-0
CA2IE
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
CA1IE
R/W-0
PIC17C7XX
x = Bit is unknown
R/W-0
TX1IE
DS30289B-page 35
RC1IE
R/W-0
bit 0

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