PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 37

• Manufacturer Part Number: PIC17C756A-33/L
• Description: 68 PIN, 32 KB OTP, 902 RAM, 50 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC17C756A-33/L

• A/d Inputs: 12-Channel, 10-Bit
• Cpu Speed: 8.25 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 52
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 32K Bytes
• Ram Size: 902 Bytes
• Speed: 16 MHz
• Timers: 2-8-bit, 2-16-bit
• Voltage, Range: 3-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

6.3
These registers contains the individual flag bits for the
peripheral interrupts.
REGISTER 6-4: PIR1 REGISTER (ADDRESS: 16h, BANK 1)
2000 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Peripheral Interrupt Request
Register1 (PIR1) and Register2
(PIR2)
Legend:
R = Readable bit
- n = Value at POR Reset
bit 7
RBIF: PORTB Interrupt-on-Change Flag bit
1 = One of the PORTB inputs changed (software must end the mismatch condition)
0 = None of the PORTB inputs have changed
TMR3IF: TMR3 Interrupt Flag bit
If Capture1 is enabled (CA1/PR3 = 1):
1 = TMR3 overflowed
0 = TMR3 did not overflow
If Capture1 is disabled (CA1/PR3 = 0):
1 = TMR3 value has rolled over to 0000h from equalling the period register (PR3H:PR3L) value
0 = TMR3 value has not rolled over to 0000h from equalling the period register (PR3H:PR3L)
TMR2IF: TMR2 Interrupt Flag bit
1 = TMR2 value has rolled over to 0000h from equalling the period register (PR2) value
0 = TMR2 value has not rolled over to 0000h from equalling the period register (PR2) value
TMR1IF: TMR1 Interrupt Flag bit
If TMR1 is in 8-bit mode (T16 = 0):
1 = TMR1 value has rolled over to 0000h from equalling the period register (PR1) value
0 = TMR1 value has not rolled over to 0000h from equalling the period register (PR1) value
If Timer1 is in 16-bit mode (T16 = 1):
1 = TMR2:TMR1 value has rolled over to 0000h from equalling the period register (PR2:PR1)
0 = TMR2:TMR1 value has not rolled over to 0000h from equalling the period register (PR2:PR1)
CA2IF: Capture2 Interrupt Flag bit
1 = Capture event occurred on RB1/CAP2 pin
0 = Capture event did not occur on RB1/CAP2 pin
CA1IF: Capture1 Interrupt Flag bit
1 = Capture event occurred on RB0/CAP1 pin
0 = Capture event did not occur on RB0/CAP1 pin
TX1IF: USART1 Transmit Interrupt Flag bit (state controlled by hardware)
1 = USART1 Transmit buffer is empty
0 = USART1 Transmit buffer is full
RC1IF: USART1 Receive Interrupt Flag bit (state controlled by hardware)
1 = USART1 Receive buffer is full
0 = USART1 Receive buffer is empty
R/W-x
RBIF
value
value
value
TMR3IF
R/W-0
TMR2IF
R/W-0
W = Writable bit
’1’ = Bit is set
TMR1IF
R/W-0
Note:
R/W-0
CA2IF
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
These bits will be set by the specified condi-
tion, even if the corresponding interrupt
enable bit is cleared (interrupt disabled), or
the GLINTD bit is set (all interrupts disabled).
Before enabling an interrupt, the user may
wish to clear the interrupt flag to ensure that
the program does not immediately branch to
the peripheral Interrupt Service Routine.
CA1IF
R/W-0
PIC17C7XX
x = Bit is unknown
TX1IF
R-1
DS30289B-page 37
RC1IF
R-0
bit 0