PSB21150FV14XT Infineon Technologies, PSB21150FV14XT Datasheet - Page 172

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PSB21150FV14XT

Manufacturer Part Number
PSB21150FV14XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21150FV14XT

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
ISTAD
4.1
4.1.1
RFIFOD
A read access to any address within the range 00h-1Fh gives access to the “current”
FIFO location selected by an internal pointer which is automatically incremented after
each read access. This allows for the use of efficient “move string” type commands by
the microcontroller.
The RFIFOD contains up to 32 bytes of received data.
After an ISTAD.RPF interrupt, a complete data block is available. The block size can be
4, 8, 16 or 32 bytes depending on the EXMD2.RFBS setting.
After an ISTAD.RME interrupt, the number of received bytes can be obtained by reading
the RBCLD register.
4.1.2
XFIFOD
A write access to any address within the range 00-1F
location selected by an internal pointer which is automatically incremented after each
write access. This allows the use of efficient “move string” type commands by the
microcontroller.
Depending on EXMD2.XFBS up to 16 or 32 bytes of transmit data can be written to the
XFIFOD following an ISTAD.XPR interrupt.
4.1.3
Value after reset: 10
Data Sheet
7
7
7
D-channel HDLC Control and C/I Registers
RFIFOD - Receive FIFO D-Channel
XFIFOD - Transmit FIFO D-Channel
ISTAD - Interrupt Status Register D-Channel
RME
RPF
H
RFO
Transmit data
Receive data
XPR
172
XMR
XDU
H
gives access to the “current” FIFO
Detailed Register Description
0
0
0
0
PSB/PSF 21150
0
WR (00-1F)
RD (00-1F)
2003-01-30
IPAC-X
RD (20)

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