PSB21150FV14XT Infineon Technologies, PSB21150FV14XT Datasheet - Page 201

• Manufacturer Part Number: PSB21150FV14XT
• Manufacturer: Infineon Technologies

Specifications of PSB21150FV14XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

ARX
ATX
4.3.4
Value after reset: (not defined)
AR7-0 ... Auxiliary Receive
The value of AR7-0 always reflects the level at pin AUX7-0 at the time when ARX is read
by the host even if a pin is configured as output. If the mask bit for AUX7, 6 is set in the
MASKA register, no interrupt is generated to the IPAC-X, however, the current state at
pin AUX7,6 can be read from AR7,6
Note: In NT and LT modes the pins AUX0-2 are not available as I/O pins.
4.3.5
Value after reset: 00
AT7-0 ... Auxiliary Transmit
A ’0’ or ’1’ in AT7-0 will drive a low or a high level at pin AUX7-0 if the corresponding
output is enabled in the AOE register.
Note: In NT and LT modes the pins AUX0-2 are not available as I/O pins.
Data Sheet
7
7
ARX - Auxiliary Interface Receive Register
ATX - Auxiliary Interface Transmit Register
AR7
AT7
AR6
AT6
H
AR5
AT5
AR4
AT4
201
AR3
AT3
AR2
AT2
Detailed Register Description
AR1
AT1
0
0
AR0
AT0
PSB/PSF 21150
2003-01-30
IPAC-X
WR (3F)
RD (3F)