PSB21150HV14XP Lantiq, PSB21150HV14XP Datasheet - Page 217

• Manufacturer Part Number: PSB21150HV14XP
• Manufacturer: Lantiq

Specifications of PSB21150HV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

IPAC-X
PSB/PSF 21150
Detailed Register Description
4.4.20
MOCR - MONITOR Control Register
Value after reset: 00
H
7
0
MOCR
MRE
MRC
MIE
MXC
0
0
0
0
RD/WR (5E)
MRE ... MONITOR Receive Interrupt Enable
0: MONITOR interrupt status MDR generation is masked
1: MONITOR interrupt status MDR generation is enabled
MRC ... MR Bit Control
Determines the value of the MR bit:
0:MR is always ’1’. In addition, the MDR interrupt is blocked, except for the first byte of
a packet (if MRE = 1).
1:MR is internally controlled by the IPAC-X according to MONITOR channel protocol.
In addition, the MDR interrupt is enabled for all received bytes according to the
MONITOR channel protocol (if MRE = 1).
MIE ... MONITOR Interrupt Enable
MONITOR interrupt status MER, MDA, MAB generation is enabled (1) or masked (0).
MXC ... MX Bit Control
Determines the value of the MX bit:
0:The MX bit is always ’1’.
1:The MX bit is internally controlled by the IPAC-X according to MONITOR channel
protocol.
Data Sheet
217
2003-01-30