PSB21150HV14XP Lantiq, PSB21150HV14XP Datasheet - Page 221

• Manufacturer Part Number: PSB21150HV14XP
• Manufacturer: Lantiq

Specifications of PSB21150HV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

IPAC-X
PSB/PSF 21150
Detailed Register Description
INT1, 0 ... Auxiliary Interrupt from external devices 1, 0
A low level or a negative state transition (programmable in ACFG2.EL1/0) is detected at
pin AUX7 or AUX6, respectively.
4.5.4
AUXM - Auxiliary Mask Register
Value after reset: FF
H
7
0
AUXM
1
1
EAW
WOV
TIN2
TIN1
INT1
INT0
WR (61)
For the MASK register following logical states are applied:
0: Interrupt is enabled
1: Interrupt is disabled
Each interrupt source in the AUXI register can selectively be masked/disabled by setting
the corresponding bit in AUXM to ’1’. Masked interrupt status bits are not indicated when
AUXI is read. Instead, they remain internally stored and pending, until the mask bit is
reset to ’0’.
Data Sheet
221
2003-01-30