TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 197

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

10.4
10.4.1
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
Register Map
The register map shows all the Tsi148 register groupings in the Combined Register Group
(CRG). The CRG requires 4 Kbytes of address space. The address space can be mapped into
PCI/X address space or VMEbus address space. Refer to
information on the CRG and all the group that comprise the Tsi148 registers.
Conventions
The following conventions are used to describe the operation of a register bit and are found in
the “Type” column of the register description table:
•
•
•
•
•
•
The following conventions are used to describe the effect of the reset signals on a register bit
and are found in the “Reset By” heading of the register description table:
•
•
•
•
Bits that are reset by multiple signals show the signals with a slash (/) separating them. For
example, if a bit is reset by all the reset signals, the register table shows the following value:
L/S/P/X.
R: Read Only field
R/W: Read/Write field.
S: Writing a 1 to this field sets this field.
C: Writing a1 to this field clears an associated field.
R/S: Writing a 1 to this field sets an associated field. Reading this field returns the current
value of the associated field.
R/C: Writing a1 to this field clears an associated field. Reading this field returns the
current value of the associated field
L: The field is affected by PCI/X local bus reset.
S: The field is affected by VMEbus system reset.
P: The field is affected by power up reset.
x: The reset value depends on configuration options.
Section 10.2.1 on page 192
10. Registers > Register Map
for more
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