TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 44

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

2. VME Interface > Overview of the VME Interface
2.1
2.2
2.2.1
44
Overview of the VME Interface
The Tsi148 VME Interface is compliant with the following standards:
•
•
•
The interface is separated into VME Slave and VME Master modules. The Tsi148 has been
designed so that it can accept its own transaction on the VMEbus. If the Tsi148 VME Master
initiates a transaction on the VMEbus, and the address falls within the inbound address
window for the Tsi148 VME Slave, then the VME Slave accepts the cycle. For more
information on VME master and slave transactions, refer to
Section 2.3 on page
VME Slave
The VME Slave is responsible for tracking and maintaining coherency to the VMEbus
protocols. The VME Slave supports A16, A24, A32, and A64 address spaces and D8, D16,
D32, and D64 data transfer sizes. The VME Slave supports SCT, BLT, MBLT, 2eVME, and
2eSST protocols.
During a read transaction, the VME Slave does not assert the DTACK* signal to acknowledge
the data until after the data has been received from the PCI/X bus. During write transactions,
the VME Slave posts the data into the write buffer. The VMEbus considers the write
complete, and Tsi148 manages the completion of the write posted transaction on the PCI/X
bus.
All transactions are completed on the PCI/X bus in the same order that they are completed on
the VMEbus. A read transaction forces all previously issued posted write transactions to be
flushed from the write buffers. All posted write transfers are completed before a read is begun
to make sure that all transfers are completed in the order issued.
VME Slave Buffers
The VME Slave has a single read buffer that stores command information when servicing a
transaction from the VMEbus, and receives the read data from the Linkage Module after the
PCI/X Master has retrieved the data from the PCI/X bus. The read buffer is segmented into
two parts: a data queue and a command queue. The command queue stores address and
command information for a single VMEbus transaction. The amount of data in read buffer
depends on the type of transaction requested. The data queue can store up to 2 Kbyte of data.
American National Standard for VME64
American National Standard for VME64 Extensions
Source Synchronous Transfer (2eSST) Standard
55.
Tsi148 PCI/X-to-VME Bus Bridge User Manual
Section 2.2.1.2 on page 48
80A3020_MA001_13
and