PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 177

no-image

PSB3186FV1.4

Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB3186FV1.4

Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
 Details
PSB 3186
PSF 3186
Detailed Register Description
4.4.4
AUXM - Auxiliary Mask Register
Value after reset: FF
H
7
0
AUXM
1
1
EAW
WOV
TIN2
TIN1
1
1
WR (61)
For the MASK register following logical states are applied:
0: Interrupt is enabled
1: Interrupt is disabled
Each interrupt source in the AUXI register can selectively be masked/disabled by setting
the corresponding bit in AUXM to ’1’. Masked interrupt status bits are not indicated when
AUXI is read. Instead, they remain internally stored and pending, until the mask bit is
reset to ’0’.
Data Sheet
177
2000-08-23

Related parts for PSB3186FV1.4