PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 30
PSB3186FV1.4
Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV1.4.pdf
(207 pages)
Specifications of PSB3186FV1.4
Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
Details
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3.2.1.1
The basic structure of a read/write access to the ISAC-SX TE registers via the serial
control interface is shown in
Figure 6
A new programming sequence starts with the transfer of a header byte. The header byte
specifies different programming sequences allowing a flexible and optimized access to
the individual functional blocks of the ISAC-SX TE.
The possible sequences for access to the complete address range 00
Table 4
Table 4
Header
Byte
40
48
43
41
49
Note: In order to access the address range 00
Data Sheet
write sequence:
read sequence:
H
H
H
H
H
/44
/4C
/47
/45
/4D
SDR
SDR
SDX
to ’0’ (header bytes 40
must be set to ’1’ (header bytes 44
H
H
H
H
H
and described after that.
Programming Sequences
Sequence
Adr-Data-Adr-Data
Adr-Data-Data-Data
7
7
Serial Control Interface Timing
Header Byte Code
header
header
H
Figure
, 48
H
0 7 6
0 7 6
, 43
write
read
0
1
6.
Sequence Type
Alternating Read/Write (non-interleaved)
Alternating Read/Write (interleaved)
Read-only/Write-only (constant address)
Read and following Write-only (non-interleaved)
Read and following Write-only (interleaved)
H
, 41
H
byte 2
, 4C
30
H
address
byte 2
address
, 49
H
H
-7F
, 47
H
), and for the addresses 80
H
H
Description of Functional Blocks
bit 2 of the header byte must be set
, 45
0 7
0 7
H
, 4D
H
write data
read data
).
byte 3
byte 3
H
-7F
H
PSB 3186
are listed in
PSF 3186
0
0
H
2000-08-23
-FF
H
bit 2
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