ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 106

• Manufacturer Part Number: ST72344S4
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72344S4

• Up To 16 Kbytes Program Memory: single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
• 256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
• 5 Power-saving Modes: Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
• 16-bit Timer A With: 1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

On-chip peripherals
Note:
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1
2
3
4
Figure 55. Pulse width modulation cycle
If OLVL1=1 and OLVL2=0 the length of the positive pulse is the difference between the
OC2R and OC1R registers.
If OLVL1=OLVL2 a continuous signal will be seen on the OCMP1 pin.
The OC
the following formula:
Where:
●
●
●
If the timer clock is an external clock the formula is:
Where:
●
●
The Output Compare 2 event causes the counter to be initialized to FFFCh (See
The OCF1 and OCF2 bits cannot be set by hardware in PWM mode therefore the Output
Compare interrupt is inhibited.
The ICF1 bit is set by hardware when the counter reaches the OC2R value and can produce
a timer interrupt if the ICIE bit is set and the I bit is cleared.
In PWM mode the ICAP1 pin can not be used to perform input capture because it is
disconnected to the timer. The ICAP2 pin can be used to perform input capture (ICF2 can be
set and IC2R can be loaded) but the user must take care that the counter is reset each
period and ICF1 can also generate interrupt if ICIE is set.
When the pulse-width modulation (PWM) and One-pulse mode (OPM) bits are both set, the
PWM mode is the only active one.
t = Signal or pulse period (in seconds)
f
PRESC
Clock control
t = Signal or pulse period (in seconds)
f
CPU
EXT
i
R register value required for a specific timing application can be calculated using
= External timer clock frequency (in Hertz)
= CPU clock frequency (in Hertz)
OCiR =
= Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits, see
t
bits)
*
f
EXT
-5
Counter
= OC1R
Counter
= OC2R
When
When
Doc ID 12321 Rev 5
OCiR Value =
Pulse-width modulation cycle
OCMP1 = OLVL2
OCMP1 = OLVL1
Counter is reset
ICF1 bit is set
PRESC
t
*
to FFFCh
f
CPU
- 5
ST72344xx ST72345xx
Table 50:
Figure
54)