ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 226

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ST72344S4

Manufacturer Part Number
ST72344S4
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72344S4

Up To 16 Kbytes Program Memory
single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
5 Power-saving Modes
Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
16-bit Timer A With
1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
Electrical characteristics
Note:
226/247
1
2
Subject to general operating condition for V
Table 113. ADC characteristics
1. Unless otherwise specified, typical data are based on T
2. When V
3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than
4. The stabilization time of the AD converter is masked by the first t
Figure 118. Typical A/D converter application
C
quality) plus the pad capacitance (3 pF). A high C
accuracy. To remedy this, f
This graph shows that depending on the input signal variation (f
for stabilization time and decreased to allow the use of a larger serial resistor (R
PARASITIC
Symbol
C
t
as design guidelines and are not tested.
10 kΩ). Data based on characterization results, not tested in production.
is then always valid.
R
f
V
t
I
STAB
ADC
ADC
ADC
ADC
V AIN
AIN
AIN
DDA
represents the capacitance of the PCB (dependent on soldering and PCB layout
ADC clock frequency
Conversion voltage range
External input resistor
Internal sample and hold capacitor
Stabilization time after ADC
enable
Conversion time (Sample+Hold)
– Sample capacitor loading time
– Hold conversion time
Analog Part
Digital Part
and V
R AIN
SSA
pins are not available on the pinout, the ADC refers to V
C AIN
Parameter
AINx
ADC
Doc ID 12321 Rev 5
should be reduced.
(2)
V DD
DD
f
f
CPU
ADC
V T
0.6 V
V T
0.6 V
, f
Conditions
A
OSC
= 25 °C and V
= 8 MHz,
= 4 MHz
PARASITIC
, and T
LOAD
2 kΩ (max)
I L
±1
. The first conversion after the enable
A
value will downgrade conversion
μA
V
DD
unless otherwise specified.
Min
0.4
SSA
-V
AIN
SS
= 5 V. They are given only
DD
), C
10-Bit A/D
Conversion
Typ
ST72344xx ST72345xx
and V
0
0.2
3.5
10
6
1
4
AIN
(4)
(1)
SS.
can be increased
V
10
Max
DDA
4
(3)
ST72XXX
AIN)
C ADC
6 pF
.
1/f
MHz
Unit
mA
pF
µs
V
ADC

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