ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 59

• Manufacturer Part Number: ST72344S4
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72344S4

• Up To 16 Kbytes Program Memory: single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
• 256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
• 5 Power-saving Modes: Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
• 16-bit Timer A With: 1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST72344xx ST72345xx
Note:
Table 16.
During the execution of an interrupt routine, the HALT, POPCC, RIM, SIM and WFI
instructions change the current software priority up to the next IRET instruction or one of the
previously mentioned instructions.
Table 17.
1. Valid for Halt and Active-halt modes except for the MCC/RTC interrupt source which exits from Active-halt
2. Exit from Halt possible when SPI is in slave mode.
RIM
SIM
TRAP
WFI
No.
10
11
12
13
0
1
2
3
4
5
6
7
8
9
Instruction
mode only and AWU interrupt which exits from AWUFH mode only.
TRAP/ICD Software or ICD interrupt
MCC/RTC RTC time base interrupt
I2C3SNS I2C3SNS address 3 interrupt
I2C3SNS
TIMER A TIMER A peripheral interrupts
TIMER B TIMER B peripheral interrupts
Source
Reset
block
AWU
AVD
SPI
SCI
ei0
ei1
ei2
ei3
I
2
C
Dedicated interrupt instruction set (continued)
Interrupt mapping
Enable interrupt (level 0 set)
Disable interrupt (level 3 set)
Software trap
Wait for interrupt
Reset
Auto wakeup interrupt
External interrupt Port PA3, PE1
External interrupt Port PF2:0
External interrupt Port PB3:0
External interrupt Port PB4
I2C3SNS address 1 & 2
interrupt
SPI peripheral interrupts
SCI peripheral interrupt
Auxiliary-voltage-detector
interrupt
I
2
C peripheral interrupt
New description
Description
Doc ID 12321 Rev 5
Load 10 in I1:0 of CC 1
Load 11 in I1:0 of CC 1
Software NMI
Function/example
AWUCSR
I2C3SSR
Register
MCCSR
I2CSRx
SICSR
SPISR
SCISR
TBSR
TASR
label
N/A
N/A
N/A
N/A
N/A
Priority
Highest
Lowest
priority
priority
order
1
1
I1
Exit from
Halt
yes
yes
yes
yes
yes
yes
yes
yes
no
no
no
no
no
no
no
no
H
(2)
(1)
0
1
1
0
I0
FFECh-FFEDh
FFFCh-FFFDh
FFEAh-FFEBh
FFEEh-FFEFh
FFFEh-FFFFh
FFFAh-FFFBh
FFE8h-FFE9h
FFE6h-FFE7h
FFE4h-FFE5h
FFE2h-FFE3h
FFE0h-FFE1h
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
N
Address
vector
Interrupts
Z
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C