cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 352

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

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KEL Register Descriptions
5.10.2.5
I/O Port
Type
Reset Value
Bit 4 of KELX_CTL (MSR 5140001Fh[4]) is the Port A Enable bit. It must be set to 1 to enable access to this register; oth-
erwise, Port A accesses are directed to the LPC bus where a Port A register may exist in a SuperI/O device.
:
Bit
7:2
1
0
7
Port A (KEL_PORTA)
Name
RSVD
A20_MASK
SYSR
092h
R/W
00h
6
Description
Reserved. Writes have no effect; reads return 0.
A20 Mask. This bit is necessary for older programs that require Port A Address bit 20
emulation. It requires ASMIs to be enabled in order for software to recognize the chang-
ing of this bit, and subsequent proper emulation of the A20 address bit (see
PORTA_A20_ASMI_EN bit in DIVIL GLD_MSR_SMI, MSR 51400002h[6], for ASMI
enabling details). Anytime this bit is changed an ASMI is generated.
If this bit is 1 and a 0 is written, and ASMI generation is enabled, then proper VSA oper-
ation causes a rollover of address from A[19:0] = all 1s, to A[19:0] = all 0s. Address bit
A20 is 0.
If this bit is 0 and a 1 is written, and ASMI generation is enabled, then no legacy rollover
occurs from address [19:0] = all 1s. The next incremental address is A20 = 1 and
A[19:0] = all 0.
Legacy System Reset. Writing a 1 to this bit causes a system soft reset (INIT) that will
only happen if ASMIs are enabled (see PORTA_INIT_ASMI_EN bit in DIVIL
GLD_MSR_SMI, MSR 51400002h[7], for ASMI enabling details). Writing a 0 to this bit
has no effect. This bit always reads as 0.
5
(Continued)
RSVD
KEL_PORTA Bit Descriptions
KEL_PORTA Register Map
4
352
3
2
A20_MASK
1
SYSR
Revision 0.8
0