cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 387
cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Revision 0.8
UART/IR Controller Register Descriptions
5.12.5.6
I/O Offset
Type
Reset Value
RXFLV returns the number of bytes in the RX_FIFO. It can be used for software debugging.
5.12.6 Bank 3 Register Descriptions
The bit formats for the registers in Bank 3 are summarized in Table 5-41. Detailed descriptions of each register follow.
5.12.6.1
I/O Offset
Type
Reset Value
MRID identifies the revision of the module. When read, it returns the module ID and revision level in the format 0xh, where
x indicates the revision number.
I/O Offset
04h-07h
Bit
7:6
5:0
00h
01h
02h
03h
7
7
Register
RX_FIFO Current Level Register (RXFLV)
Module Identification and Revision ID Register (MRID)
RSVD
Name
RSVD
RFL[5:0]
Name
MRID
SH_LCR
SH_FCR
BSR
RSVD
07h
RO
00h
00h
RO
0xh
6
6
MID[3:0]
RSVD
BKSE
Description
Reserved. Return 0s.
Number of Bytes in RX_FIFO. These bits specify the number of bytes in the RX_FIFO.
Note:
7
RXFTH[1:0]
5
5
The contents of TXFLV and RXFLV are not frozen during CPU reads. Therefore,
invalid data could be returned if the CPU reads these registers during normal
transmitter and receiver operation. To obtain correct data, the software should
perform three consecutive reads and then take the data from the second read if
the first and second reads yield the same result. It can also be taken from the
third read if the first and second reads yield different results.
SBRK
6
Table 5-41. Bank 3 Bit Map
RXFLV Bit Descriptions
MID[3:0]
RXFLV Register Map
MRID Register Map
4
4
STKP
5
TXFTH[1:0]
387
(Continued)
EPS
3
3
4
RSVD
RFL[5:0]
Bits
BSR[6:0]
RSVD
PEN
3
2
2
RID[3:0]
TXSR
STB
2
RID[3:0]
1
1
WLS1
RXSR
1
www.national.com
FIFO_EN
WLS0
0
0
0
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