tda5235 Infineon Technologies Corporation, tda5235 Datasheet - Page 217

• Manufacturer Part Number: tda5235
• Description: Enhanced Sensitivity Double-configuration Receiver With Digital Baseband Processing
• Manufacturer: Infineon Technologies Corporation

TSI Detection Mode Register
A_TSIMODE
TSI Detection Mode Register
Field
TSIGRSYN
TSIWCA
CPHRA
TSIDETMOD
TSI Length Register A
A_TSILENA
TSI Length Register A
Data Sheet
Bits
7
6:3
2
1:0
Type
w
w
w
w
Description
TSI Gap Resync Mode (only for TSIDETMODE=2
0
1
Reset: 1
Wild Cards for 4 LSB chips of Correlator A
If all 4 chips are 0, the whole TSI pattern for Correlator A is valid
if a chip is 1, the corresponding chip from the TSI pattern is ignored
Reset: 0
Code Phase Readjustment in Payload
0
1
Reset: 0
TSI Detection Mode
00
01
10
11
Reset: 0
B
B
B
B
B
B
B
B
so the overall GAP time can be
defined in T/16 steps.
In this mode the T/2 GAP resolution can be set in the 5 MSB
TSIGAP register bits.
GAPVAL value is not used. Prefered in TSI Gap Mode.
B is valid if A_TSILENA=16 (=10
(sequentially with Gap between TSIA & TSIB)
matching information), dependent on found TSI A or B, 0 resp. 1 will
be sent as 1st received bit.
Disabled - In this mode the GAPVAL and TSIGAP values are used,
8 Bit Extended TSI Mode - TSI configurations A OR B (parallel with
Enabled - PLL resync after TSI Gap
disabled - code polarity is defined by the TSI pattern
enabled - code phase readjustment in payload
16 Bit TSI Mode - TSI configuration B AND A valid (sequentially),
8 Bit Parallel TSI Mode - TSI configurations A OR B (parallel)
8 Bit TSI Gap Mode - TSI configurations A AND B with Gap
H
H
H
H
Offset
Offset
04D
04E
217
H
H
H
) and the A_TSILENB > 0
Register Description
H
)
V1.0, 2010-02-19
Reset Value
Reset Value
Appendix
TDA5235
80
00
H
H