tda5235 Infineon Technologies Corporation, tda5235 Datasheet - Page 25

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tda5235

Manufacturer Part Number
tda5235
Description
Enhanced Sensitivity Double-configuration Receiver With Digital Baseband Processing
Manufacturer
Infineon Technologies Corporation
Datasheet

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TDA5235
Functional Description
2.4.5
Sigma-Delta Fractional-N PLL Block
The Sigma-Delta Fractional-N PLL is fully integrated on chip. The Voltage Controlled
Oscillator (VCO) with on-chip LC-tank runs at approximately 3.6 GHz and is first divided
with a band select divider by 1, 2 or 3 and then with an I/Q-divider by 4 which provides
an orthogonal local oscillator signal for the first image reject mixer with the necessary
high accuracy.
The multi-modulus divider determines the channel selection and is controlled by a
rd
3
order Sigma-Delta Modulator (SDM). A type IV phase detector, a charge pump with
programmable current and an on-chip loop filter closes the phase locked loop.
st
To 1
mixer
3.6 GHz VCO
Loop Filter
CP
IQ Divider
Band Select
÷ 4
÷1/÷2/÷3
Multi-
modulus
PFD
Divider
ΣΔ Modulator
Channel FN
QOSC
22MHz
AFC filter
AFC-data
Figure 9
Synthesizer Block Diagram
Data Sheet
25
V1.0, 2010-02-19

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