tda5235 Infineon Technologies Corporation, tda5235 Datasheet - Page 43

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tda5235

Manufacturer Part Number
tda5235
Description
Enhanced Sensitivity Double-configuration Receiver With Digital Baseband Processing
Manufacturer
Infineon Technologies Corporation
Datasheet

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2.4.8.3
An all-digital PLL (ADPLL) recovers the data clock from the incoming data stream. The
second main function is the generation of a signal indicating symbol synchronization.
Synchronization on the incoming data stream generally occurs within the first 4 bits of a
telegram.
Figure 19
Clock Recovery is implemented as standard ADPLL PI regulator with Timing
Extrapolation Unit for fast settling.
In the unlocked state, the Timing Extrapolation Unit calculates the frequency offset for
the incoming data stream. If the defined number of Bi-phase encoded bits are detected
(the RUNIN length can be set in the x_CDRRI register), the I-part and the PLL oscillator
will be set and the PLL will be locked.
When x_CDRRI.RUNLEN is set to small values, then the I-part is less accurate (residual
error) and can lead to a longer needed PLL settling time and worse performance in the
Data Sheet
Recovery Slicer
from Clock
Clock and Data Recovery
Clock Recovery (ADPLL)
T
nom
T
nom
/ 16
Detector
/ 2
Phase
Timing Extrapolation
Loop Filter
PI
43
Controlled
Oscillator
Digital
T
EOM
nom
/ 2
Functional Description
Sync found
Recovered
Symbol
Clock
V1.0, 2010-02-19
TDA5235

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