tda5235 Infineon Technologies Corporation, tda5235 Datasheet - Page 99

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tda5235

Manufacturer Part Number
tda5235
Description
Enhanced Sensitivity Double-configuration Receiver With Digital Baseband Processing
Manufacturer
Infineon Technologies Corporation
Datasheet

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2.6.1.3
This state (item 12 in
Slave. This state can be reached after the Start-Up Sequencer and Initialization of the
chip have been completed from any state from 3 to 11. To reconfigure the chip the SFR
control bit HOLD must be set. After reconfiguration in this state the SFR control bit HOLD
must be cleared again. After leaving the HOLD state, the INIT state is entered and the
receiver can work with the new settings. Be aware that the time between changing the
configuration and reinitialization of the chip has to be at least 40us. Take note that one
SPI command for clearing the SFR control bit HOLD needs 24 bits or 12μs at an SPI
data rate of 2.0Mbit/s. The remaining 28μs must be guaranteed by the application.
Figure 70
In case of large frequency steps, an additional VAC routine (VCO Automatic Calibration)
has to be activated when recovering from HOLD Mode (INITPLLHOLD bit). The
maximum allowed frequency step in HOLD Mode without activation of VAC routine is
depending on the selected frequency band. The limits are +/- 1 MHz for the 315 MHz
band, +/- 1.5 MHz for the 434 MHz band and +/- 3 MHz for the 868/915 MHz band.
When this additional VAC routine is enabled, the TDA5235 starts initialization of the
Digital Receiver block after release from HOLD and an additional Channel Hop time.
Figure 71
HOLD Mode is only available in Run Mode Slave. Configuration changes in Self Polling
Mode have to be done by switching to SLEEP Mode and returning to Self Polling Mode
after reconfiguration.
Data Sheet
SPI Command
SPI Command
FSM State
FSM State
HOLD Mode
Instruction
Write
0x02
Instruction
HOLD State Behavior (INITPLLHOLD disabled)
HOLD State Behavior (INITPLLHOLD enabled)
Write
0x02
EOM-Check
Address
CMC0
EOM-Check
Address
CMC0
Figure
HOLD=1
Data
HOLD=1
Data
Instruction
Write
0x02
69) is used for fast reconfiguration of the chip in Run Mode
Instruction
Address
x_PLL...
Write
0x02
(sel. other
channel)
Address
x_PLL...
Data
(sel. other
channel)
Data
99
HOLD
40us
HOLD
Instruction
Write
0x02
12us @ 2.0MHz
Address
CMC0
40us
Instruction
HOLD=0
Write
0x02
Data
Functional Description
12us @ 2.0MHz
Address
CMC0
VAC
t
C _Hop
HOLD=0
Data
V1.0, 2010-02-19
VAC
INIT
TDA5235
INIT
Wait till
SSync
Wait till
SSync

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