tda5235 Infineon Technologies Corporation, tda5235 Datasheet - Page 27

• Manufacturer Part Number: tda5235
• Description: Enhanced Sensitivity Double-configuration Receiver With Digital Baseband Processing
• Manufacturer: Infineon Technologies Corporation

2.4.6
Figure 10
The IC comprises two separate demodulators for ASK and FSK.
After combining FSK and ASK data path, a sampling rate adaptation follows to meet an
output oversampling between 8 and 16 samples per chip. Finally, an oversampling of 8
samples per chip can be achieved using a fractional sample rate converter (SRC) with
linear interpolation (for further details see
2.4.6.1
The RSSI generator delivers a DC signal proportional to the applied input power at a
logarithmic scale (dBm) and is also used as an ASK demodulator. Via a programmable
anti-aliasing filter this signal is converted to the digital domain by means of a 10-bit ADC.
For the AM demodulation a signal proportional to the linear power is required. Therefore
a conversion from logarithmic scale to linear scale is necessary. This is done in the digital
domain by a nonlinear filter together with an exponential function. The analog RSSI
signal after the anti-aliasing filter is available at the RSSI pin via a buffer amplifier. To
enable this buffer the SFR control bit RSSIMONEN must be set. The anti-aliasing filter
can be by-passed for visualization on the RSSI pin (see AAFBYP control bit).
Data Sheet
conversion
B = 50..300kHz
2nd
channel filter
PPF2
BP
buffer
RSSI
ASK and FSK Demodulator
ASK Demodulator
FM limiter
RSSI
Functional Block Diagram ASK/FSK Demodulator
ASK
FSK
Mux
VDDD/2
Temp
ADC
f
System
Div
RSSI Offset
RSSI Slope
Dig. Gain
33 / 46 / 65 / 93 / 132 /
190 / 239 / 282 kHz
(2sided PDF BW)
Control
band limitation (noise)
image suppression /
Figure
27
Peak Memory
RSSI Peak
Detector
register
Filter
15).
Begin of config /
x*WULOT
RSSIPWU
RSSIPMF
channel ,
(internal
register
signal)
delog
AGC
AFC track/freeze
FSK/ASK
Functional Description
loop filter
TH, BL, BH
Analog Gain Control
AFC
>
RF PLL ctrl
WU event
Rate adapter
Rate doubler
Decimation
V1.0, 2010-02-19
Bypass
RSSIPWU
register
(data rate dependent )
8 … 16 samples /chip
TDA5235
End of config/
channel
Demodulated
Data