ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 101

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

(21) CR21
B7 : Transmitting side speech codec operation mode notification flag
B6 : Transmitting side buffering time operation mode notification flag
B5 : 2-channel transmission requesting status notification register
B4 : Transmission frame start notification register
B3 : CH1 transmission error status retgister
B2 : CH0 transmission error status retgister
B1 : CH1 transmission request notification register
OKI Semiconductor
setting can be
Mode where
Initial value
0 : Other than G.711 (μ-law / A-law)
1 : G.711 (μ-law / A-law)
0 : 10 ms
1 : 20 ms
By referencing this bit, the operating mode of the buffering time on the transmitting side can be checked. If this
bit is “0” when a transmission request is made by a fall of FR0B, it indicates that the transmit buffer is buffering
encode data for 10 ms. If this bit is “1” when a transmission request is made by a fall of FR0B, it indicates that
the transmit buffer is buffering encode data for 20 ms.
0 : Other than the state where 2-channel transmission is being requested
1 : 2-channel transmission is being requested
While requesting 2-channel transmission (TXREQ_DC=1), two transmission requests will be made within one
frame.
Read the transmit data of channel 0 by a CH0 transmission request (FR0_CH0 = 1), and the transmission data of
channel 1 by a CH1 transmission request (FR0_CH1)
While requesting 2-channel transmission (TXREQ_DC = 1), two transmission requests will be made within one
frame. With this bit, the start timing of each transmission frame can be checked.
While requesting 2-channel transmission (TXREQ_DC = 1), this bit is set to “1” immediately before a CH0
transmission request (FR0_CH0 = 1), and cleared to “0” immediately before a CH1 transmission request
(FR0_CH1 = 1).
0 : No CH1 transmission error occurred
1 : CH1 transmission error occurred
This register is set to “1” if the reading of CH1 transmit data does not complete within the valid read period, and
set to “0” for other cases.
0 : No CH0 transmission error occurred
1 : CH0 transmission error occurred
This register is set to “1” if the reading of CH0 transmit data does not complete within the valid read period, and
set to “0” for other cases.
0 : No CH1 transmission request generated
1 : CH1 transmission request generated
This register is set to “1” if the transmit buffer storing CH1 transmit data becomes full, and set to “0” if the
reading of data in the transmit buffer is complete or the specified time is exceeded.
changed
CR21
TX_SC
FLAG
B7
⎯
0
TX_BT
FLAG
B6
⎯
0
TXREQ
DC
B5
⎯
0
TXREQ
First
B4
⎯
0
TXERR
_CH1
B3
⎯
0
TXERR
_CH0
B2
⎯
0
_CH1
FR0
B1
⎯
0
FEDL7224-001FULL-01
_CH0
ML7224-001TC
FR0
B0
⎯
0
101/225
R/W
R/