ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 217

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

Configuration Example 2 (three-way calling: two persons on the terminal side [CH0a–CH1a], one person on
the network side)
This configuration example shows a case of calling made by three persons: two persons (Mr. A and Mr. B) on the
terminal side, one person (Mr. C) on the network side.
This configuration example shows a case where two persons on the terminal side are connected to CH0a and CH1a.
To make a three-way calling in this configuration, control the speech path switch using the following settings:
T1_TXON_a (CR44a-B7) = 1, T1_RXON_a (CR44a-B6) = 1
R0_RXON_b (CR44b-B0) = 1, T0_RXON_a (CR44a-B2) = 1
OKI Semiconductor
B
A
VFRO0_a
VFRO1 _a
VFRO0_b
VFRO1_b
PCMO_a
B
PCMO_b
AIN0 N_ a
AIN0P_ a
AIN1N_ a
AIN1P_ a
AIN0N_b
AIN0P_b
AIN1N_b
AIN1P_b
CLKSEL
GSX 0_b
GSX 1_b
PCMI_a
GSX0_ a
GSX1_ a
AVREF
PCMI_b
SYNC
BCLK
A
C
C
XO
XI
AMP1 Ra
AMP0 Rb
AMP1 Ra
AMP0Ra
12.288MHz
10kΩ
10 kΩ
10 kΩ
10 kΩ
VREF
OSC
S/P
P/S
S /P
P /S
10 kΩ
AMP 0Ta
10kΩ
AMP 1Ta
10kΩ
AMP 0Tb
10kΩ
AMP 1Ta
poa
pob
pia
pib
pia
poa
pib
pob
VFRO0_SEL _a
VFRO0_SEL _b
VFRO1_SEL _b
VFRO1_SEL_a
OTS1_SEL_b
OTS1_SEL_a
OTS0_SEL_b
OTS0_SEL_a
ITS1_SEL_a
ITS1_SEL_b
ITS0_SEL_a
ITS1Ua
ITS1Ub
PLL
ITS0Ua
ITS0La
OTS0Ua
ITS1La
OTS1Ua
OTS1La
ITS0Ub
ITS0Lb
OTS0Ub
OTS0Lb
ITS1Lb
OTS1Ub
OTS1Lb
OTS0La
ITS0_SEL_b
CKG
PCM CODEC( CH1a)
PCM CODEC(CH0a)
PCM CODEC(CH0b)
PCM CODEC(CH1b)
N
CODEC(CH0a)
CODEC(CH1a)
CODEC(CH0b)
CODEC(CH1b)
A/D0a
D/A0a
A/D1a
D/A1a
A/D0b
D/A0b
A/D1b
D/A1b
PCM_SEL[1: 0]_a
PCM_SEL[1: 0]_a
PCM_SEL[1: 0]_b
PCM_SEL[1: 0]_b
Linear PCM
Linear PCM
Linear PCM
Linear PCM
G.711
G.711
G.711
G.711
G.711
G. 711
G.711
G.711
G.711
G.711
G.711
SYNC(8kHz)
MCK
u-law
G.711
A-law
G. 711
G.711
A-law
u-law
A-law
u-law
A-law
u-law
A-law
G. 711
G.711
A-law
u-law
A-law
u-law
A-law
u-law
u-law
BPF
BPF
BPF
BPF
LPF
LPF
LPF
LPF
CH1_IFSEL_a
CH0_IFSEL_a
CH0_IFSEL_b
CH1_IFSEL_b
CH0_IFSEL_a
CH0_IFSEL _b
CH1_IFSEL_a
CH1_IFSEL_b
PDWN
STGAIN 1a
STGAIN 1b
CONT
STGAIN0a
STGAIN 0b
DTMFDET
DTMFDET
DTMFDET
DTMFDET
TXDET0a
TXDET1a
TXDET0b
TXDET1b
TONE_
TD_TX
TONE_
TD_TX
DET1a
TONE_
TD_TX
DET0b
TONE_
TD_TX
DET1b
DET0a
0a
1a
0b
1b
Sin
Rout
Sin
Rout
Sin
Rout
Sin
Rout
POWER
Echo Canceller
Echo Canceller
Echo Canceller
Echo Canceller
DTMF0_DET_a
DTMF1_DET_a
DTMF1_C[ 3:0]_a
ANS_TXDET 1_a
ANSPM _TXDET 1_a
DTMF0_DET_b
DTMF0_C[ 3:0]_b
ANS_TXDET 0_b
ANSPM _TXDET 0_b
DTMF1_DET_b
DTMF1_C[ 3:0]_b
ANS_TXDET 1_b
ANSPM _TXDET 1_b
TONE_TXDET0_a
DTMF0_C[ 3:0]_a
ANS_TXDET 0_a
ANSPM_TXDET 0_a
TONE_TXDET1_a
TONE_TXDET0_b
TONE_TXDET0_b
(CH0b)
(CH1b)
(CH0a )
(CH1a )
FSKGEN 0a
FSKGEN 1
FSKGEN0b
FSKGEN1b
Sout
Sout
Sout
Sout
FGEN 0_FLAG_b
FGEN 1_FLAG_b
FGEN0_FLAG_a
FGEN1_FLAG_a
Rin
Rin
Rin
Rin
a
TGEN1_EXFLAG _a
TGEN1_EXFLAG _b
TGEN0_EXFLAG _a
TGEN0_EXFLAG _b
TXGAIN 0
_CH0a
TXGAIN 0
_CH0b
TXGAIN 0
_CH1a
RXGAIN1
_CH0b
RXGAIN 1
_CH1a
TXGAIN0
RXGAIN 1
_CH0a
RXGAIN 1
_CH1b
TEST
Set T 1_TXON_a
Set T 1_RXON_a
Set T 0_RXON_a
_CH1b
TXSIG_CH0a
TXSIG_CH1a
TXSIG_CH0b
TXSIG_CH1b
TGEN1b
TGEN0a
RXSIG_CH1a
RXSIG_CH0b
RXSIG_CH1b
RXSIG_CH0a
ON.
ON.
TGEN1a
ON.
TGEN0b
Note: Only one of FSKGEN 0b, TGEN0b, and DPGEN 0b can be
used at a time .
Note: Using the tone disabler function
TD_TXDET0b) and tone detection function
TONE_TXDET0b) at the same time is not allowed .
Note: Only one of FSKGEN 0a, TGEN 0a, and DPGEN 0a can be
used at a time .
Note: Using the tone disabler function
TD_TXDET0a) and tone detection function
TONE_TXDET 0a) at the same time is not allowed .
T0a
T1a
MGENb
T0b
T1b
MGENa
MGEN_EXFLAG _b
MGEN_FRFLAG_b
MGEN_EXFLAG _a
MGEN_FRFLAG _a
Note: Only one of FSKGEN 1a, TGEN1a, and DPGEN 1a can be
used at a time .
Note: Using the tone disabler function
TD_TXDET1a) and tone detection function
TONE_TXDET1a) at the same time is not allowed .
Note: Only one of FSKGEN 1b, TGEN1b, and DPGEN 1b can be
used at a time .
Note: Using the tone disabler function
TD_TXDET1b) and tone detection function
TONE_TXDET1b) at the same time is not allowed .
R0a
T 0a
R0b
T0b
R1a
T1a
R1b
T 1b
R0a
R1a
R0b
R1b
RXGAIN0
RXGAIN0
RXGAIN0
TXGAIN1
RXGAIN 0
TXGAIN 1
TXGAIN1
TXGAIN 1
_CH0a
_CH1a
_CH0b
_CH1b
_CH1b
MGb
_CH0b
MGa
_CH0a
_CH1a
MGa
MGb
Set R 0_RXON_b
ON.
Speech CODEC( CH0a)
Speech CODEC( CH1a)
Speech CODEC(CH0b)
Speech CODEC(CH1b)
RXDET1b
RXDET0a
RXDET1a
TIM_b
RXDET0b
TIM_a
TONE_
TONE_
TD_RX
TD_RX
DET0a
TD_RX
DET1a
TONE_
TD_RX
DET0b
TONE_
DET1b
RXSC_SEL[1:0] _b
RXSC_SEL[1:0] _b
TXSC_SEL[1:0]_a
RXSC_SEL[ 1:0]_a
TXSC_SEL[1:0]_a
RXSC_SEL[ 1:0]_a
TXSC_SEL [1:0]_b
TXSC_SEL [1:0]_b
(TD_RXDET0b/
G .711
G .711
G .711
G .711
G .711
G .711
G .711
G .711
G.711
G.711
G.711
G.711
G.711
G.711
G.711
G.711
(u-law)
(A-law)
(u-law)
(A-law)
(u-law)
(A-law)
(u-law)
(A-law)
(u-law)
(A- law)
(u-law)
(A- law)
(u-law)
(A- law)
(u-law)
(A- law)
(TD_RXDET0a/
(TONE_RXDET0b/
(TONE_RXDET0a/
(TD_RXDET1a/
(TD_RXDET1b/
ANS_RXDET0_a
TONE_RXDET0_a
ANS_RXDET1_b
ANSPM _RXDET1_b
TONE_RXDET1_b
ANSPM_RXDET 0_a
ANS_RXDET1_a
ANSPM_RXDET 1_a
TONE_RXDET1_a
ANS_RXDET0_b
ANSPM_RXDET 0_b
TONE_RXDET0_b
Note: The following markings are used to indicate the functions whose use is
Use prohibited
(TONE_RXDET1a/
(TONE_RXDET1b/
prohibited and the functions for which restriction
SCIF _SEL_b
SCIF_SEL_a
SCIF_SEL_b
SCIF_SEL_b
SCIF_SEL_b
SCIF_SEL_a
SCIF_SEL_a
SCIF_SEL_a
DP0_DET_a
DPDET0_D[ 7:0]_a
DP1_DET_a
DPDET1_D[7:0] _a
DP0_DET_b
DPDET0_D[7:0] _b
DP1_DET_b
DPDET1_D[7:0] _b
With restrictions
poa
pia
poa
pia
pob
pib
pob
pib
CH0a
CH1a
CH0b
CH1b
CH0a
CH1a
CH0b
CH1b
DPGEN0a
DPGEN1a
DPGEN0b
DPGEN1b
DPDET0b
DPDET0a
DPDET1a
DPDET1b
(CR0a-CR47a)
(CR0 b-CR47 b)
GPIA0_a
GPIA1_a
GPIB0_a
GPIB1_a
GPIA0_b
GPIA1_b
GPIB0_b
GPIB1_b
FRAME/DMA
FRAME/DMA
Controller_ a
Controller_b
FEDL7224-001FULL-01
TX-FIFO0a
TX-FIFO1a
RX- FIFO0a
RX- FIFO1a
Register_ a
LOADERa
CONTROL
TX-FIFO0b
TX-FIFO1b
RX-FIFO0 b
RX-FIFO1 b
Register_b
LOADERb
CONTROL
SERIAL
DOWN
SERIAL
Control
DOWN
Control
FR0_CH0_a
FR0_CH1_a
FR1_a
FR0_CH0_b
FR0_CH1_b
FR1_b
s are set.
[GPCR0 a
GPCR7a]
[GPCR0b
GPCR7b]
GPIOa
GPIOb
INT_a
INT_ b
to
to
ML7224-001TC
16b
16b
2b
4b
8b
8 b
2b
4b
8b
8b
A
ACK1B _a
ACK0B _a
FR1 B_a
FR0 B_a
WRB_a
RDB_a
CSB_a
D[15 :0]_a
A[7:0]_ a
GPIOA[1:0]_a
GPIOB[3:0]_a
GPIOC[7:0 ]_a
ACK1B_b
ACK0B_b
FR1B _b
FR0B _b
WRB_ b
RDB_ b
CSB_b
D[15:0]_b
A[7 :0]_b
GPIOA[1:0]_ b
GPIOB[3:0]_ b
GPIOC[7 :0]_b
INTB_ b
INTB_a
C
SDO_a
SDI_ a
SCLK_a
SDENB_a
SCNTEN
SDO_b
SDI_b
SCLK_b
SDENB_b
B
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