ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 200

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ml7084-001

Manufacturer Part Number
ml7084-001
Description
4ch Voip Codec
Manufacturer
Oki Semiconductor
Datasheet
C. DPDET1 polarity control register (DPDET1_POL)
D. DPDET1 detected dial pulse count display register (DPDET1_D[7:0])
E. Internal data memory for setting DPDET1 ON guard timer (DPDET1_ON_TIM)
F. Internal data memory for setting DPDET1 OFF guard timer (DPDET1_OFF_TIM)
G. Internal data memory for setting DPDET1 detection end timer (DPDET1_DETOFF_TIM)
(Note)
To activate DPDET1, set GPIOB[1] to input in advance. Also, activate it after setting the level of input to GPIOB[1]
to meet the following conditions by setting value(s) in the DPDET1 polarity control register (DPDET1_POL).
OKI Semiconductor
Controls the polarity input from the GPIOB[1] pin.
0 : Does not invert polarity. (Initial value)
1 : Inverts polarity.
Initial value : 00h (State where no dial pulse detected)
Displays the number of detected dial pulses. This register is updated when an edge is detected.
Initial value : 0014h (5 ms)
Use the following equation when changing the timer value.
Equation: Guard timer value in ms/0.250 ms
Example: 5 ms
5/0.250 = 20d = 0014h
Initial value : 0014h (5 ms)
Use the following equation when changing the timer value.
Equation: Guard timer value in ms/0.250 ms
Example: 5 ms
5/0.250 = 20d = 0014h
Initial value : 01F4h (125 ms)
Use the following equation when changing the timer value.
Equation: Guard timer value in ms/0.125 ms
Example: 125 ms
125/0.250 = 0500d = 01F4h
• DPDET1_POL = “0”, GPIOB[1] = “0”
• DPDET1_POL = “1”, GPIOB[1] = “1”
Upper limit : 8191.75 ms
Lower limit : 0.250 ms
Upper limit : 8191.75 ms
Lower limit : 0.250 ms
Upper limit : 8191.75 ms
Lower limit : 0.250 ms
: 5 ms
: 5 ms
: 125 ms
(data: 7FFFh)
(data: 0014h)
(data: 0001h)
(data: 7FFFh)
(data: 0014h)
(data: 0001h)
(data: 7FFFh)
(data: 01F4h)
(data: 0001h)
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